1 // SPDX-License-Identifier: GPL-2.0-or-later
62  *    1. 9-bit with the Data/Command signal as the ninth bit
63  *    2. Same as above except it's sent as 16 bits
64  *    3. 8-bit with the Data/Command signal as a separate D/CX pin
108 	if (!dbi->read_commands)  in mipi_dbi_command_is_read()
112 		if (!dbi->read_commands[i])  in mipi_dbi_command_is_read()
114 		if (cmd == dbi->read_commands[i])  in mipi_dbi_command_is_read()
122  * mipi_dbi_command_read - MIPI DCS read command
134 	if (!dbi->read_commands)  in mipi_dbi_command_read()
135 		return -EACCES;  in mipi_dbi_command_read()
138 		return -EINVAL;  in mipi_dbi_command_read()
145  * mipi_dbi_command_buf - MIPI DCS command with parameter(s) in an array
159 	/* SPI requires dma-safe buffers */  in mipi_dbi_command_buf()
162 		return -ENOMEM;  in mipi_dbi_command_buf()
164 	mutex_lock(&dbi->cmdlock);  in mipi_dbi_command_buf()
165 	ret = dbi->command(dbi, cmdbuf, data, len);  in mipi_dbi_command_buf()
166 	mutex_unlock(&dbi->cmdlock);  in mipi_dbi_command_buf()
183 		return -ENOMEM;  in mipi_dbi_command_stackbuf()
194  * mipi_dbi_buf_copy - Copy a framebuffer, transforming it if necessary
199  * @swap: When true, swap MSB/LSB of 16-bit values
200  * @fmtcnv_state: Format-conversion state
209 	struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(fb->dev);  in mipi_dbi_buf_copy()
218 	switch (fb->format->format) {  in mipi_dbi_buf_copy()
230 		switch (dbidev->pixel_format) {  in mipi_dbi_buf_copy()
240 		drm_err_once(fb->dev, "Format is not supported: %p4cc\n",  in mipi_dbi_buf_copy()
241 			     &fb->format->format);  in mipi_dbi_buf_copy()
242 		ret = -EINVAL;  in mipi_dbi_buf_copy()
255 	struct mipi_dbi *dbi = &dbidev->dbi;  in mipi_dbi_set_window_address()
257 	xs += dbidev->left_offset;  in mipi_dbi_set_window_address()
258 	xe += dbidev->left_offset;  in mipi_dbi_set_window_address()
259 	ys += dbidev->top_offset;  in mipi_dbi_set_window_address()
260 	ye += dbidev->top_offset;  in mipi_dbi_set_window_address()
271 	struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(fb->dev);  in mipi_dbi_fb_dirty()
272 	unsigned int height = rect->y2 - rect->y1;  in mipi_dbi_fb_dirty()
273 	unsigned int width = rect->x2 - rect->x1;  in mipi_dbi_fb_dirty()
275 	struct mipi_dbi *dbi = &dbidev->dbi;  in mipi_dbi_fb_dirty()
276 	bool swap = dbi->swap_bytes;  in mipi_dbi_fb_dirty()
282 	full = width == fb->width && height == fb->height;  in mipi_dbi_fb_dirty()
284 	DRM_DEBUG_KMS("Flushing [FB:%d] " DRM_RECT_FMT "\n", fb->base.id, DRM_RECT_ARG(rect));  in mipi_dbi_fb_dirty()
286 	if (!dbi->dc || !full || swap ||  in mipi_dbi_fb_dirty()
287 	    fb->format->format == DRM_FORMAT_XRGB8888) {  in mipi_dbi_fb_dirty()
288 		tr = dbidev->tx_buf;  in mipi_dbi_fb_dirty()
293 		tr = src->vaddr; /* TODO: Use mapping abstraction properly */  in mipi_dbi_fb_dirty()
296 	mipi_dbi_set_window_address(dbidev, rect->x1, rect->x2 - 1, rect->y1,  in mipi_dbi_fb_dirty()
297 				    rect->y2 - 1);  in mipi_dbi_fb_dirty()
299 	if (fb->format->format == DRM_FORMAT_XRGB8888)  in mipi_dbi_fb_dirty()
300 		dst_format = drm_format_info(dbidev->pixel_format);  in mipi_dbi_fb_dirty()
302 		dst_format = fb->format;  in mipi_dbi_fb_dirty()
308 		drm_err_once(fb->dev, "Failed to update display %d\n", ret);  in mipi_dbi_fb_dirty()
312  * mipi_dbi_pipe_mode_valid - MIPI DBI mode-valid helper
317  * display. Drivers can use this as their &drm_simple_display_pipe_funcs->mode_valid
323 	struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);  in mipi_dbi_pipe_mode_valid()
325 	return drm_crtc_helper_mode_valid_fixed(&pipe->crtc, mode, &dbidev->mode);  in mipi_dbi_pipe_mode_valid()
330  * mipi_dbi_pipe_update - Display pipe update helper
335  * this as their &drm_simple_display_pipe_funcs->update callback.
340 	struct drm_plane_state *state = pipe->plane.state;  in mipi_dbi_pipe_update()
342 	struct drm_framebuffer *fb = state->fb;  in mipi_dbi_pipe_update()
346 	if (!pipe->crtc.state->active)  in mipi_dbi_pipe_update()
352 	if (!drm_dev_enter(fb->dev, &idx))  in mipi_dbi_pipe_update()
356 		mipi_dbi_fb_dirty(&shadow_plane_state->data[0], fb, &rect,  in mipi_dbi_pipe_update()
357 				  &shadow_plane_state->fmtcnv_state);  in mipi_dbi_pipe_update()
364  * mipi_dbi_enable_flush - MIPI DBI enable helper
370  * in their &drm_simple_display_pipe_funcs->enable callback.
381 	struct drm_framebuffer *fb = plane_state->fb;  in mipi_dbi_enable_flush()
384 		.x2 = fb->width,  in mipi_dbi_enable_flush()
386 		.y2 = fb->height,  in mipi_dbi_enable_flush()
390 	if (!drm_dev_enter(&dbidev->drm, &idx))  in mipi_dbi_enable_flush()
393 	mipi_dbi_fb_dirty(&shadow_plane_state->data[0], fb, &rect,  in mipi_dbi_enable_flush()
394 			  &shadow_plane_state->fmtcnv_state);  in mipi_dbi_enable_flush()
395 	backlight_enable(dbidev->backlight);  in mipi_dbi_enable_flush()
403 	struct drm_device *drm = &dbidev->drm;  in mipi_dbi_blank()
404 	u16 height = drm->mode_config.min_height;  in mipi_dbi_blank()
405 	u16 width = drm->mode_config.min_width;  in mipi_dbi_blank()
406 	struct mipi_dbi *dbi = &dbidev->dbi;  in mipi_dbi_blank()
414 	dst_format = drm_format_info(dbidev->pixel_format);  in mipi_dbi_blank()
417 	memset(dbidev->tx_buf, 0, len);  in mipi_dbi_blank()
419 	mipi_dbi_set_window_address(dbidev, 0, width - 1, 0, height - 1);  in mipi_dbi_blank()
421 			     (u8 *)dbidev->tx_buf, len);  in mipi_dbi_blank()
427  * mipi_dbi_pipe_disable - MIPI DBI pipe disable helper
432  * &drm_simple_display_pipe_funcs->disable callback.
436 	struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);  in mipi_dbi_pipe_disable()
440 	if (dbidev->backlight)  in mipi_dbi_pipe_disable()
441 		backlight_disable(dbidev->backlight);  in mipi_dbi_pipe_disable()
445 	if (dbidev->regulator)  in mipi_dbi_pipe_disable()
446 		regulator_disable(dbidev->regulator);  in mipi_dbi_pipe_disable()
447 	if (dbidev->io_regulator)  in mipi_dbi_pipe_disable()
448 		regulator_disable(dbidev->io_regulator);  in mipi_dbi_pipe_disable()
453  * mipi_dbi_pipe_begin_fb_access - MIPI DBI pipe begin-access helper
468 	return drm_gem_begin_shadow_fb_access(&pipe->plane, plane_state);  in mipi_dbi_pipe_begin_fb_access()
473  * mipi_dbi_pipe_end_fb_access - MIPI DBI pipe end-access helper
484 	drm_gem_end_shadow_fb_access(&pipe->plane, plane_state);  in mipi_dbi_pipe_end_fb_access()
489  * mipi_dbi_pipe_reset_plane - MIPI DBI plane-reset helper
497 	drm_gem_reset_shadow_plane(&pipe->plane);  in mipi_dbi_pipe_reset_plane()
502  * mipi_dbi_pipe_duplicate_plane_state - duplicates MIPI DBI plane state
515 	return drm_gem_duplicate_shadow_plane_state(&pipe->plane);  in mipi_dbi_pipe_duplicate_plane_state()
520  * mipi_dbi_pipe_destroy_plane_state - cleans up MIPI DBI plane state
532 	drm_gem_destroy_shadow_plane_state(&pipe->plane, plane_state);  in mipi_dbi_pipe_destroy_plane_state()
538 	struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(connector->dev);  in mipi_dbi_connector_get_modes()
540 	return drm_connector_helper_get_modes_fixed(connector, &dbidev->mode);  in mipi_dbi_connector_get_modes()
561 		swap(mode->hdisplay, mode->vdisplay);  in mipi_dbi_rotate_mode()
562 		swap(mode->hsync_start, mode->vsync_start);  in mipi_dbi_rotate_mode()
563 		swap(mode->hsync_end, mode->vsync_end);  in mipi_dbi_rotate_mode()
564 		swap(mode->htotal, mode->vtotal);  in mipi_dbi_rotate_mode()
565 		swap(mode->width_mm, mode->height_mm);  in mipi_dbi_rotate_mode()
568 		return -EINVAL;  in mipi_dbi_rotate_mode()
584  * mipi_dbi_dev_init_with_formats - MIPI DBI device initialization with custom formats
616 	struct drm_device *drm = &dbidev->drm;  in mipi_dbi_dev_init_with_formats()
619 	if (!dbidev->dbi.command)  in mipi_dbi_dev_init_with_formats()
620 		return -EINVAL;  in mipi_dbi_dev_init_with_formats()
626 	dbidev->tx_buf = devm_kmalloc(drm->dev, tx_buf_size, GFP_KERNEL);  in mipi_dbi_dev_init_with_formats()
627 	if (!dbidev->tx_buf)  in mipi_dbi_dev_init_with_formats()
628 		return -ENOMEM;  in mipi_dbi_dev_init_with_formats()
630 	drm_mode_copy(&dbidev->mode, mode);  in mipi_dbi_dev_init_with_formats()
631 	ret = mipi_dbi_rotate_mode(&dbidev->mode, rotation);  in mipi_dbi_dev_init_with_formats()
634 		return -EINVAL;  in mipi_dbi_dev_init_with_formats()
637 	drm_connector_helper_add(&dbidev->connector, &mipi_dbi_connector_hfuncs);  in mipi_dbi_dev_init_with_formats()
638 	ret = drm_connector_init(drm, &dbidev->connector, &mipi_dbi_connector_funcs,  in mipi_dbi_dev_init_with_formats()
643 	ret = drm_simple_display_pipe_init(drm, &dbidev->pipe, funcs, formats, format_count,  in mipi_dbi_dev_init_with_formats()
644 					   modifiers, &dbidev->connector);  in mipi_dbi_dev_init_with_formats()
648 	drm_plane_enable_fb_damage_clips(&dbidev->pipe.plane);  in mipi_dbi_dev_init_with_formats()
650 	drm->mode_config.funcs = &mipi_dbi_mode_config_funcs;  in mipi_dbi_dev_init_with_formats()
651 	drm->mode_config.min_width = dbidev->mode.hdisplay;  in mipi_dbi_dev_init_with_formats()
652 	drm->mode_config.max_width = dbidev->mode.hdisplay;  in mipi_dbi_dev_init_with_formats()
653 	drm->mode_config.min_height = dbidev->mode.vdisplay;  in mipi_dbi_dev_init_with_formats()
654 	drm->mode_config.max_height = dbidev->mode.vdisplay;  in mipi_dbi_dev_init_with_formats()
655 	dbidev->rotation = rotation;  in mipi_dbi_dev_init_with_formats()
656 	dbidev->pixel_format = formats[0];  in mipi_dbi_dev_init_with_formats()
658 		dbidev->dbi.write_memory_bpw = 8;  in mipi_dbi_dev_init_with_formats()
667  * mipi_dbi_dev_init - MIPI DBI device initialization
687 	size_t bufsize = mode->vdisplay * mode->hdisplay * sizeof(u16);  in mipi_dbi_dev_init()
689 	dbidev->drm.mode_config.preferred_depth = 16;  in mipi_dbi_dev_init()
698  * mipi_dbi_hw_reset - Hardware reset of controller
701  * Reset controller if the &mipi_dbi->reset gpio is set.
705 	if (!dbi->reset)  in mipi_dbi_hw_reset()
708 	gpiod_set_value_cansleep(dbi->reset, 0);  in mipi_dbi_hw_reset()
710 	gpiod_set_value_cansleep(dbi->reset, 1);  in mipi_dbi_hw_reset()
716  * mipi_dbi_display_is_on - Check if display is on
749 	struct device *dev = dbidev->drm.dev;  in mipi_dbi_poweron_reset_conditional()
750 	struct mipi_dbi *dbi = &dbidev->dbi;  in mipi_dbi_poweron_reset_conditional()
753 	if (dbidev->regulator) {  in mipi_dbi_poweron_reset_conditional()
754 		ret = regulator_enable(dbidev->regulator);  in mipi_dbi_poweron_reset_conditional()
761 	if (dbidev->io_regulator) {  in mipi_dbi_poweron_reset_conditional()
762 		ret = regulator_enable(dbidev->io_regulator);  in mipi_dbi_poweron_reset_conditional()
765 			if (dbidev->regulator)  in mipi_dbi_poweron_reset_conditional()
766 				regulator_disable(dbidev->regulator);  in mipi_dbi_poweron_reset_conditional()
778 		if (dbidev->regulator)  in mipi_dbi_poweron_reset_conditional()
779 			regulator_disable(dbidev->regulator);  in mipi_dbi_poweron_reset_conditional()
780 		if (dbidev->io_regulator)  in mipi_dbi_poweron_reset_conditional()
781 			regulator_disable(dbidev->io_regulator);  in mipi_dbi_poweron_reset_conditional()
790 	if (dbi->reset)  in mipi_dbi_poweron_reset_conditional()
799  * mipi_dbi_poweron_reset - MIPI DBI poweron and reset
815  * mipi_dbi_poweron_conditional_reset - MIPI DBI poweron and conditional reset
835  * mipi_dbi_spi_cmd_max_speed - get the maximum SPI bus speed
837  * @len: The transfer buffer length.
841  * at 10MHz, preventing transfer glitches from messing up the init settings.
848 	return min_t(u32, 10000000, spi->max_speed_hz);  in mipi_dbi_spi_cmd_max_speed()
855  * If the SPI controller doesn't have 9 bits per word support,
856  * use blocks of 9 bytes to send 8x 9-bit words using a 8-bit SPI transfer.
875 	size_t chunk, max_chunk = dbi->tx_buf9_len;  in mipi_dbi_spi1e_transfer()
876 	struct spi_device *spi = dbi->spi;  in mipi_dbi_spi1e_transfer()
878 		.tx_buf = dbi->tx_buf9,  in mipi_dbi_spi1e_transfer()
895 			return -EINVAL;  in mipi_dbi_spi1e_transfer()
897 		/* Command: pad no-op's (zeroes) at beginning of block */  in mipi_dbi_spi1e_transfer()
898 		dst = dbi->tx_buf9;  in mipi_dbi_spi1e_transfer()
917 		len -= chunk;  in mipi_dbi_spi1e_transfer()
918 		dst = dbi->tx_buf9;  in mipi_dbi_spi1e_transfer()
923 			/* Data: pad no-op's (zeroes) at end of block */  in mipi_dbi_spi1e_transfer()
929 					*dst++ = carry | BIT(8 - i) | (val >> i);  in mipi_dbi_spi1e_transfer()
930 					carry = val << (8 - i);  in mipi_dbi_spi1e_transfer()
933 					*dst++ = carry | BIT(8 - i) | (val >> i);  in mipi_dbi_spi1e_transfer()
934 					carry = val << (8 - i);  in mipi_dbi_spi1e_transfer()
941 					*dst++ = carry | BIT(8 - i) | (val >> i);  in mipi_dbi_spi1e_transfer()
942 					carry = val << (8 - i);  in mipi_dbi_spi1e_transfer()
992 	struct spi_device *spi = dbi->spi;  in mipi_dbi_spi1_transfer()
1007 	max_chunk = dbi->tx_buf9_len;  in mipi_dbi_spi1_transfer()
1008 	dst16 = dbi->tx_buf9;  in mipi_dbi_spi1_transfer()
1041 		len -= chunk;  in mipi_dbi_spi1_transfer()
1054 	struct spi_device *spi = dbi->spi;  in mipi_dbi_typec1_command_read()
1056 			     spi->max_speed_hz / 2);  in mipi_dbi_typec1_command_read()
1061 			.tx_buf = dbi->tx_buf9,  in mipi_dbi_typec1_command_read()
1075 		return -EINVAL;  in mipi_dbi_typec1_command_read()
1082 		dev_err(&spi->dev,  in mipi_dbi_typec1_command_read()
1084 		return -EOPNOTSUPP;  in mipi_dbi_typec1_command_read()
1089 	 * buffer. Only 9 bits of this will be used when executing the actual  in mipi_dbi_typec1_command_read()
1090 	 * transfer.  in mipi_dbi_typec1_command_read()
1092 	dst16 = dbi->tx_buf9;  in mipi_dbi_typec1_command_read()
1105 				   u8 *parameters, size_t num)  in mipi_dbi_typec1_command()  argument
1111 		return mipi_dbi_typec1_command_read(dbi, cmd, parameters, num);  in mipi_dbi_typec1_command()
1113 	MIPI_DBI_DEBUG_COMMAND(*cmd, parameters, num);  in mipi_dbi_typec1_command()
1116 	if (ret || !num)  in mipi_dbi_typec1_command()
1120 		bpw = dbi->write_memory_bpw;  in mipi_dbi_typec1_command()
1122 	return mipi_dbi_spi1_transfer(dbi, 1, parameters, num, bpw);  in mipi_dbi_typec1_command()
1130 	struct spi_device *spi = dbi->spi;  in mipi_dbi_typec3_command_read()
1132 			     spi->max_speed_hz / 2);  in mipi_dbi_typec3_command_read()
1148 		return -EINVAL;  in mipi_dbi_typec3_command_read()
1151 	 * Support non-standard 24-bit and 32-bit Nokia read commands which  in mipi_dbi_typec3_command_read()
1157 			return -EINVAL;  in mipi_dbi_typec3_command_read()
1164 		return -ENOMEM;  in mipi_dbi_typec3_command_read()
1168 	spi_bus_lock(spi->controller);  in mipi_dbi_typec3_command_read()
1169 	gpiod_set_value_cansleep(dbi->dc, 0);  in mipi_dbi_typec3_command_read()
1173 	spi_bus_unlock(spi->controller);  in mipi_dbi_typec3_command_read()
1195 				   u8 *par, size_t num)  in mipi_dbi_typec3_command()  argument
1197 	struct spi_device *spi = dbi->spi;  in mipi_dbi_typec3_command()
1203 		return mipi_dbi_typec3_command_read(dbi, cmd, par, num);  in mipi_dbi_typec3_command()
1205 	MIPI_DBI_DEBUG_COMMAND(*cmd, par, num);  in mipi_dbi_typec3_command()
1207 	spi_bus_lock(spi->controller);  in mipi_dbi_typec3_command()
1208 	gpiod_set_value_cansleep(dbi->dc, 0);  in mipi_dbi_typec3_command()
1211 	spi_bus_unlock(spi->controller);  in mipi_dbi_typec3_command()
1212 	if (ret || !num)  in mipi_dbi_typec3_command()
1216 		bpw = dbi->write_memory_bpw;  in mipi_dbi_typec3_command()
1218 	spi_bus_lock(spi->controller);  in mipi_dbi_typec3_command()
1219 	gpiod_set_value_cansleep(dbi->dc, 1);  in mipi_dbi_typec3_command()
1220 	speed_hz = mipi_dbi_spi_cmd_max_speed(spi, num);  in mipi_dbi_typec3_command()
1221 	ret = mipi_dbi_spi_transfer(spi, speed_hz, bpw, par, num);  in mipi_dbi_typec3_command()
1222 	spi_bus_unlock(spi->controller);  in mipi_dbi_typec3_command()
1228  * mipi_dbi_spi_init - Initialize MIPI DBI SPI interface
1233  * This function sets &mipi_dbi->command, enables &mipi_dbi->read_commands for the
1235  * a driver-specific init.
1246  * Option 1 (D/C as a bit): The buffer is sent on the wire byte by byte so the 16-bit buffer is
1247  *                          byteswapped before transfer.
1249  * Option 3 (D/C as a gpio): If the SPI controller supports 16 bits per word the buffer can be
1250  *                           sent as-is. If not the caller is responsible for swapping the bytes
1255  * If the interface is Option 1 and the SPI controller doesn't support 9 bits per word,
1256  * the buffer is sent as 9x 8-bit words, padded with MIPI DCS no-op commands if necessary.
1264 	struct device *dev = &spi->dev;  in mipi_dbi_spi_init()
1273 	 * The virtual address is used in the transfer and the SPI core  in mipi_dbi_spi_init()
1274 	 * re-maps it on the SPI master device using the DMA streaming API  in mipi_dbi_spi_init()
1277 	if (!dev->coherent_dma_mask) {  in mipi_dbi_spi_init()
1285 	dbi->spi = spi;  in mipi_dbi_spi_init()
1286 	dbi->read_commands = mipi_dbi_dcs_read_commands;  in mipi_dbi_spi_init()
1287 	dbi->write_memory_bpw = 16;  in mipi_dbi_spi_init()
1290 		dbi->command = mipi_dbi_typec3_command;  in mipi_dbi_spi_init()
1291 		dbi->dc = dc;  in mipi_dbi_spi_init()
1293 			dbi->write_memory_bpw = 8;  in mipi_dbi_spi_init()
1294 			dbi->swap_bytes = true;  in mipi_dbi_spi_init()
1297 		dbi->command = mipi_dbi_typec1_command;  in mipi_dbi_spi_init()
1298 		dbi->tx_buf9_len = SZ_16K;  in mipi_dbi_spi_init()
1299 		dbi->tx_buf9 = devm_kmalloc(dev, dbi->tx_buf9_len, GFP_KERNEL);  in mipi_dbi_spi_init()
1300 		if (!dbi->tx_buf9)  in mipi_dbi_spi_init()
1301 			return -ENOMEM;  in mipi_dbi_spi_init()
1304 	mutex_init(&dbi->cmdlock);  in mipi_dbi_spi_init()
1306 	DRM_DEBUG_DRIVER("SPI speed: %uMHz\n", spi->max_speed_hz / 1000000);  in mipi_dbi_spi_init()
1313  * mipi_dbi_spi_transfer - SPI transfer helper
1316  * @bpw: Bits per word
1317  * @buf: Buffer to transfer
1320  * This SPI transfer helper breaks up the transfer of @buf into chunks which
1340 	 * are accepted (xfer->len % w_size must be zero).  in mipi_dbi_spi_transfer()
1341 	 * Here we align max_chunk to multiple of 2 (16bits),  in mipi_dbi_spi_transfer()
1354 		len -= chunk;  in mipi_dbi_spi_transfer()
1373 	struct seq_file *m = file->private_data;  in mipi_dbi_debugfs_command_write()
1374 	struct mipi_dbi_dev *dbidev = m->private;  in mipi_dbi_debugfs_command_write()
1379 	if (!drm_dev_enter(&dbidev->drm, &idx))  in mipi_dbi_debugfs_command_write()
1380 		return -ENODEV;  in mipi_dbi_debugfs_command_write()
1389 	for (i = count - 1; i > 0; i--)  in mipi_dbi_debugfs_command_write()
1399 			ret = -EINVAL;  in mipi_dbi_debugfs_command_write()
1413 			ret = -E2BIG;  in mipi_dbi_debugfs_command_write()
1418 	ret = mipi_dbi_command_buf(&dbidev->dbi, cmd, parameters, i);  in mipi_dbi_debugfs_command_write()
1430 	struct mipi_dbi_dev *dbidev = m->private;  in mipi_dbi_debugfs_command_show()
1431 	struct mipi_dbi *dbi = &dbidev->dbi;  in mipi_dbi_debugfs_command_show()
1436 	if (!drm_dev_enter(&dbidev->drm, &idx))  in mipi_dbi_debugfs_command_show()
1437 		return -ENODEV;  in mipi_dbi_debugfs_command_show()
1477 			   inode->i_private);  in mipi_dbi_debugfs_command_open()
1490  * mipi_dbi_debugfs_init - Create debugfs entries
1495  * Drivers can use this as their &drm_driver->debugfs_init callback.
1500 	struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(minor->dev);  in mipi_dbi_debugfs_init()
1503 	if (dbidev->dbi.read_commands)  in mipi_dbi_debugfs_init()
1505 	debugfs_create_file("command", mode, minor->debugfs_root, dbidev,  in mipi_dbi_debugfs_init()