Lines Matching +full:ssc +full:- +full:block +full:- +full:bus
77 return link_status[r - DP_LANE0_1_STATUS]; in dp_link_status()
231 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_clock_recovery_delay_us()
232 aux->name, rd_interval); in __8b10b_clock_recovery_delay_us()
243 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_channel_eq_delay_us()
244 aux->name, rd_interval); in __8b10b_channel_eq_delay_us()
256 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x\n", in __128b132b_channel_eq_delay_us()
257 aux->name, rd_interval); in __128b132b_channel_eq_delay_us()
279 * - Clock recovery vs. channel equalization
280 * - DPRX vs. LTTPR
281 * - 128b/132b vs. 8b/10b
282 * - DPCD rev 1.3 vs. later
331 drm_dbg_kms(aux->drm_dev, "%s: failed rd interval read\n", in __read_delay()
332 aux->name); in __read_delay()
362 drm_err(aux->drm_dev, "%s: failed rd interval read\n", in drm_dp_128b132b_read_aux_rd_interval()
363 aux->name); in drm_dp_128b132b_read_aux_rd_interval()
409 * drm_dp_phy_name() - Get the name of the given DP PHY
414 * non-NULL and valid.
448 return phy_cap[r - DP_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1]; in dp_lttpr_phy_cap()
463 * drm_dp_lttpr_wake_timeout_setup() - Grant extended time for sink to wake up
490 drm_dbg_kms(aux->drm_dev, in drm_dp_lttpr_wake_timeout_setup()
505 drm_dbg_kms(aux->drm_dev, in drm_dp_lttpr_wake_timeout_setup()
558 const char *arrow = request == DP_AUX_NATIVE_READ ? "->" : "<-"; in drm_dp_dump_access()
561 drm_dbg_dp(aux->drm_dev, "%s: 0x%05x AUX %s (ret=%3d) %*ph\n", in drm_dp_dump_access()
562 aux->name, offset, arrow, ret, min(ret, 20), buffer); in drm_dp_dump_access()
564 drm_dbg_dp(aux->drm_dev, "%s: 0x%05x AUX %s (ret=%3d)\n", in drm_dp_dump_access()
565 aux->name, offset, arrow, ret); in drm_dp_dump_access()
571 * The DisplayPort AUX channel is an abstraction to allow generic, driver-
575 * Transactions are described using a hardware-independent drm_dp_aux_msg
577 * Both native and I2C-over-AUX transactions are supported.
593 mutex_lock(&aux->hw_mutex); in drm_dp_dpcd_access()
596 * If the device attached to the aux bus is powered down then there's in drm_dp_dpcd_access()
599 if (aux->powered_down) { in drm_dp_dpcd_access()
600 ret = -EBUSY; in drm_dp_dpcd_access()
611 if (ret != 0 && ret != -ETIMEDOUT) { in drm_dp_dpcd_access()
616 ret = aux->transfer(aux, &msg); in drm_dp_dpcd_access()
623 ret = -EPROTO; in drm_dp_dpcd_access()
625 ret = -EIO; in drm_dp_dpcd_access()
637 drm_dbg_kms(aux->drm_dev, "%s: Too many retries, giving up. First error: %d\n", in drm_dp_dpcd_access()
638 aux->name, err); in drm_dp_dpcd_access()
642 mutex_unlock(&aux->hw_mutex); in drm_dp_dpcd_access()
647 * drm_dp_dpcd_probe() - probe a given DPCD address with a 1-byte read access
652 * be used to trigger some side-effect the read access has, like waking up the
653 * sink, without the need for the read-out value.
672 * drm_dp_dpcd_set_powered() - Set whether the DP device is powered
674 * and the function will be a no-op.
677 * If the endpoint device on the DP AUX bus is known to be powered down
688 mutex_lock(&aux->hw_mutex); in drm_dp_dpcd_set_powered()
689 aux->powered_down = !powered; in drm_dp_dpcd_set_powered()
690 mutex_unlock(&aux->hw_mutex); in drm_dp_dpcd_set_powered()
695 * drm_dp_dpcd_read() - read a series of bytes from the DPCD
702 * code on failure. -EIO is returned if the request was NAKed by the sink or
704 * function returns -EPROTO. Errors from the underlying AUX channel transfer
705 * function, with the exception of -EBUSY (which causes the transaction to
718 * gets woken up and subsequently re-enters power save mode. in drm_dp_dpcd_read()
725 if (!aux->is_remote) { in drm_dp_dpcd_read()
731 if (aux->is_remote) in drm_dp_dpcd_read()
743 * drm_dp_dpcd_write() - write a series of bytes to the DPCD
750 * code on failure. -EIO is returned if the request was NAKed by the sink or
752 * function returns -EPROTO. Errors from the underlying AUX channel transfer
753 * function, with the exception of -EBUSY (which causes the transaction to
761 if (aux->is_remote) in drm_dp_dpcd_write()
773 * drm_dp_dpcd_read_link_status() - read DPCD link status (bytes 0x202-0x207)
789 * drm_dp_dpcd_read_phy_link_status - get the link status information for a DP PHY
824 DP_LINK_STATUS_SIZE - 1); in drm_dp_dpcd_read_phy_link_status()
829 WARN_ON(ret != DP_LINK_STATUS_SIZE - 1); in drm_dp_dpcd_read_phy_link_status()
832 memmove(&link_status[DP_SINK_STATUS - DP_LANE0_1_STATUS + 1], in drm_dp_dpcd_read_phy_link_status()
833 &link_status[DP_SINK_STATUS - DP_LANE0_1_STATUS], in drm_dp_dpcd_read_phy_link_status()
834 DP_LINK_STATUS_SIZE - (DP_SINK_STATUS - DP_LANE0_1_STATUS) - 1); in drm_dp_dpcd_read_phy_link_status()
835 link_status[DP_SINK_STATUS - DP_LANE0_1_STATUS] = 0; in drm_dp_dpcd_read_phy_link_status()
854 * drm_dp_dpcd_write_payload() - Write Virtual Channel information to payload table
882 drm_dbg_kms(aux->drm_dev, "failed to write payload allocation %d\n", ret); in drm_dp_dpcd_write_payload()
889 drm_dbg_kms(aux->drm_dev, "failed to read payload table status %d\n", ret); in drm_dp_dpcd_write_payload()
899 drm_dbg_kms(aux->drm_dev, "status not set after read payload table status %d\n", in drm_dp_dpcd_write_payload()
901 ret = -EINVAL; in drm_dp_dpcd_write_payload()
911 * drm_dp_dpcd_clear_payload() - Clear the entire VC Payload ID table
925 * drm_dp_dpcd_poll_act_handled() - Poll for ACT handled status
947 drm_err(aux->drm_dev, "Failed to get ACT after %d ms, last status: %02x\n", in drm_dp_dpcd_poll_act_handled()
949 return -EINVAL; in drm_dp_dpcd_poll_act_handled()
952 * Failure here isn't unexpected - the hub may have in drm_dp_dpcd_poll_act_handled()
955 drm_dbg_kms(aux->drm_dev, "Failed to read payload table status: %d\n", status); in drm_dp_dpcd_poll_act_handled()
968 return edid && edid->revision >= 4 && in is_edid_digital_input_dp()
969 edid->input & DRM_EDID_INPUT_DIGITAL && in is_edid_digital_input_dp()
970 (edid->input & DRM_EDID_DIGITAL_TYPE_MASK) == DRM_EDID_DIGITAL_TYPE_DP; in is_edid_digital_input_dp()
974 * drm_dp_downstream_is_type() - is the downstream facing port of certain type?
996 * drm_dp_downstream_is_tmds() - is the downstream facing port TMDS?
1031 * drm_dp_send_real_edid_checksum() - send back real edid checksum value
1033 * @real_edid_checksum: real edid checksum for the last block
1045 drm_err(aux->drm_dev, "%s: DPCD failed read at register 0x%x\n", in drm_dp_send_real_edid_checksum()
1046 aux->name, DP_DEVICE_SERVICE_IRQ_VECTOR); in drm_dp_send_real_edid_checksum()
1052 drm_err(aux->drm_dev, "%s: DPCD failed read at register 0x%x\n", in drm_dp_send_real_edid_checksum()
1053 aux->name, DP_TEST_REQUEST); in drm_dp_send_real_edid_checksum()
1059 drm_dbg_kms(aux->drm_dev, "%s: Source DUT does not support TEST_EDID_READ\n", in drm_dp_send_real_edid_checksum()
1060 aux->name); in drm_dp_send_real_edid_checksum()
1066 drm_err(aux->drm_dev, "%s: DPCD failed write at register 0x%x\n", in drm_dp_send_real_edid_checksum()
1067 aux->name, DP_DEVICE_SERVICE_IRQ_VECTOR); in drm_dp_send_real_edid_checksum()
1071 /* send back checksum for the last edid extension block data */ in drm_dp_send_real_edid_checksum()
1074 drm_err(aux->drm_dev, "%s: DPCD failed write at register 0x%x\n", in drm_dp_send_real_edid_checksum()
1075 aux->name, DP_TEST_EDID_CHECKSUM); in drm_dp_send_real_edid_checksum()
1081 drm_err(aux->drm_dev, "%s: DPCD failed write at register 0x%x\n", in drm_dp_send_real_edid_checksum()
1082 aux->name, DP_TEST_RESPONSE); in drm_dp_send_real_edid_checksum()
1122 return -EIO; in drm_dp_read_extended_dpcd_caps()
1125 drm_dbg_kms(aux->drm_dev, in drm_dp_read_extended_dpcd_caps()
1127 aux->name, dpcd[DP_DPCD_REV], dpcd_ext[DP_DPCD_REV]); in drm_dp_read_extended_dpcd_caps()
1134 drm_dbg_kms(aux->drm_dev, "%s: Base DPCD: %*ph\n", aux->name, DP_RECEIVER_CAP_SIZE, dpcd); in drm_dp_read_extended_dpcd_caps()
1142 * drm_dp_read_dpcd_caps() - read DPCD caps and extended DPCD caps if
1163 return -EIO; in drm_dp_read_dpcd_caps()
1169 drm_dbg_kms(aux->drm_dev, "%s: DPCD: %*ph\n", aux->name, DP_RECEIVER_CAP_SIZE, dpcd); in drm_dp_read_dpcd_caps()
1176 * drm_dp_read_downstream_info() - read DPCD downstream port info if available
1216 return -EIO; in drm_dp_read_downstream_info()
1218 drm_dbg_kms(aux->drm_dev, "%s: DPCD DFP: %*ph\n", aux->name, len, downstream_ports); in drm_dp_read_downstream_info()
1225 * drm_dp_downstream_max_dotclock() - extract downstream facing port max dot clock
1253 * drm_dp_downstream_max_tmds_clock() - extract downstream facing port max TMDS clock
1318 * drm_dp_downstream_min_tmds_clock() - extract downstream facing port min TMDS clock
1361 * drm_dp_downstream_max_bpc() - extract downstream facing port max
1418 * drm_dp_downstream_420_passthrough() - determine downstream facing port
1419 * YCbCr 4:2:0 pass-through capability
1449 * drm_dp_downstream_444_to_420_conversion() - determine downstream facing port
1450 * YCbCr 4:4:4->4:2:0 conversion capability
1478 * drm_dp_downstream_rgb_to_ycbcr_conversion() - determine downstream facing port
1479 * RGB->YCbCr conversion capability
1484 * Returns: whether the downstream facing port can convert RGB->YCbCr for a given
1510 * drm_dp_downstream_mode() - return a mode for downstream facing port
1565 * drm_dp_downstream_id() - identify branch device
1578 * drm_dp_downstream_debug() - debug DP branch devices
1669 * drm_dp_subconnector_type() - get DP branch device type
1687 /* Can be HDMI or DVI-D, DVI-D is a safer option */ in drm_dp_subconnector_type()
1690 /* Can be VGA or DVI-A, VGA is more popular */ in drm_dp_subconnector_type()
1721 * drm_dp_set_subconnector_property - set subconnector for DP connector
1738 drm_object_property_set_value(&connector->base, in drm_dp_set_subconnector_property()
1739 connector->dev->mode_config.dp_subconnector_property, in drm_dp_set_subconnector_property()
1745 * drm_dp_read_sink_count_cap() - Check whether a given connector has a valid sink
1761 return connector->connector_type != DRM_MODE_CONNECTOR_eDP && in drm_dp_read_sink_count_cap()
1769 * drm_dp_read_sink_count() - Retrieve the sink count for a given sink
1786 return -EIO; in drm_dp_read_sink_count()
1793 * I2C-over-AUX implementation
1811 if ((msg->request & ~DP_AUX_I2C_MOT) == DP_AUX_I2C_WRITE) { in drm_dp_i2c_msg_write_status_update()
1812 msg->request &= DP_AUX_I2C_MOT; in drm_dp_i2c_msg_write_status_update()
1813 msg->request |= DP_AUX_I2C_WRITE_STATUS_UPDATE; in drm_dp_i2c_msg_write_status_update()
1834 if ((msg->request & DP_AUX_I2C_READ) == 0) in drm_dp_aux_req_duration()
1835 len += msg->size * 8; in drm_dp_aux_req_duration()
1849 if (msg->request & DP_AUX_I2C_READ) in drm_dp_aux_reply_duration()
1850 len += msg->size * 8; in drm_dp_aux_reply_duration()
1862 * the i2c bus speed is as specified. Gives the "worst"
1873 msg->size * I2C_DATA_LEN + in drm_dp_i2c_msg_duration()
1899 "Assumed speed of the i2c bus in kHz, (1-400, default 10)");
1902 * Transfer a single I2C-over-AUX message and handle various error conditions,
1918 * We also try to account for the i2c bus speed. in drm_dp_i2c_do_msg()
1923 ret = aux->transfer(aux, msg); in drm_dp_i2c_do_msg()
1925 if (ret == -EBUSY) in drm_dp_i2c_do_msg()
1931 * communicate with a non-existent DisplayPort device). in drm_dp_i2c_do_msg()
1934 if (ret == -ETIMEDOUT) in drm_dp_i2c_do_msg()
1935 drm_dbg_kms_ratelimited(aux->drm_dev, "%s: transaction timed out\n", in drm_dp_i2c_do_msg()
1936 aux->name); in drm_dp_i2c_do_msg()
1938 drm_dbg_kms(aux->drm_dev, "%s: transaction failed: %d\n", in drm_dp_i2c_do_msg()
1939 aux->name, ret); in drm_dp_i2c_do_msg()
1944 switch (msg->reply & DP_AUX_NATIVE_REPLY_MASK) { in drm_dp_i2c_do_msg()
1947 * For I2C-over-AUX transactions this isn't enough, we in drm_dp_i2c_do_msg()
1953 drm_dbg_kms(aux->drm_dev, "%s: native nack (result=%d, size=%zu)\n", in drm_dp_i2c_do_msg()
1954 aux->name, ret, msg->size); in drm_dp_i2c_do_msg()
1955 return -EREMOTEIO; in drm_dp_i2c_do_msg()
1958 drm_dbg_kms(aux->drm_dev, "%s: native defer\n", aux->name); in drm_dp_i2c_do_msg()
1962 * more careful with DP-to-legacy adapters where a in drm_dp_i2c_do_msg()
1966 * safe for all use-cases. in drm_dp_i2c_do_msg()
1972 drm_err(aux->drm_dev, "%s: invalid native reply %#04x\n", in drm_dp_i2c_do_msg()
1973 aux->name, msg->reply); in drm_dp_i2c_do_msg()
1974 return -EREMOTEIO; in drm_dp_i2c_do_msg()
1977 switch (msg->reply & DP_AUX_I2C_REPLY_MASK) { in drm_dp_i2c_do_msg()
1983 if (ret != msg->size) in drm_dp_i2c_do_msg()
1988 drm_dbg_kms(aux->drm_dev, "%s: I2C nack (result=%d, size=%zu)\n", in drm_dp_i2c_do_msg()
1989 aux->name, ret, msg->size); in drm_dp_i2c_do_msg()
1990 aux->i2c_nack_count++; in drm_dp_i2c_do_msg()
1991 return -EREMOTEIO; in drm_dp_i2c_do_msg()
1994 drm_dbg_kms(aux->drm_dev, "%s: I2C defer\n", aux->name); in drm_dp_i2c_do_msg()
1999 aux->i2c_defer_count++; in drm_dp_i2c_do_msg()
2008 drm_err(aux->drm_dev, "%s: invalid I2C reply %#04x\n", in drm_dp_i2c_do_msg()
2009 aux->name, msg->reply); in drm_dp_i2c_do_msg()
2010 return -EREMOTEIO; in drm_dp_i2c_do_msg()
2014 drm_dbg_kms(aux->drm_dev, "%s: Too many retries, giving up\n", aux->name); in drm_dp_i2c_do_msg()
2015 return -EREMOTEIO; in drm_dp_i2c_do_msg()
2021 msg->request = (i2c_msg->flags & I2C_M_RD) ? in drm_dp_i2c_msg_set_request()
2023 if (!(i2c_msg->flags & I2C_M_STOP)) in drm_dp_i2c_msg_set_request()
2024 msg->request |= DP_AUX_I2C_MOT; in drm_dp_i2c_msg_set_request()
2034 int err, ret = orig_msg->size; in drm_dp_i2c_drain_msg()
2040 return err == 0 ? -EPROTO : err; in drm_dp_i2c_drain_msg()
2043 drm_dbg_kms(aux->drm_dev, in drm_dp_i2c_drain_msg()
2045 aux->name, msg.size, err); in drm_dp_i2c_drain_msg()
2049 msg.size -= err; in drm_dp_i2c_drain_msg()
2057 * Bizlink designed DP->DVI-D Dual Link adapters require the I2C over AUX
2064 "Number of bytes to transfer in a single I2C over DP AUX CH message, (1-16, default 16)");
2069 struct drm_dp_aux *aux = adapter->algo_data; in drm_dp_i2c_xfer()
2075 if (aux->powered_down) in drm_dp_i2c_xfer()
2076 return -EBUSY; in drm_dp_i2c_xfer()
2108 msg.size = min(transfer_size, msgs[i].len - j); in drm_dp_i2c_xfer()
2151 mutex_lock(&i2c_to_aux(i2c)->hw_mutex); in lock_bus()
2156 return mutex_trylock(&i2c_to_aux(i2c)->hw_mutex); in trylock_bus()
2161 mutex_unlock(&i2c_to_aux(i2c)->hw_mutex); in unlock_bus()
2186 if (count == aux->crc_count) in drm_dp_aux_get_crc()
2187 return -EAGAIN; /* No CRC yet */ in drm_dp_aux_get_crc()
2189 aux->crc_count = count; in drm_dp_aux_get_crc()
2211 if (WARN_ON(!aux->crtc)) in drm_dp_aux_crc_work()
2214 crtc = aux->crtc; in drm_dp_aux_crc_work()
2215 while (crtc->crc.opened) { in drm_dp_aux_crc_work()
2217 if (!crtc->crc.opened) in drm_dp_aux_crc_work()
2221 if (ret == -EAGAIN) { in drm_dp_aux_crc_work()
2226 if (ret == -EAGAIN) { in drm_dp_aux_crc_work()
2227 drm_dbg_kms(aux->drm_dev, "%s: Get CRC failed after retrying: %d\n", in drm_dp_aux_crc_work()
2228 aux->name, ret); in drm_dp_aux_crc_work()
2231 drm_dbg_kms(aux->drm_dev, "%s: Failed to get a CRC: %d\n", aux->name, ret); in drm_dp_aux_crc_work()
2243 * drm_dp_remote_aux_init() - minimally initialise a remote aux channel
2251 INIT_WORK(&aux->crc_work, drm_dp_aux_crc_work); in drm_dp_remote_aux_init()
2256 * drm_dp_aux_init() - minimally initialise an aux channel
2274 mutex_init(&aux->hw_mutex); in drm_dp_aux_init()
2275 mutex_init(&aux->cec.lock); in drm_dp_aux_init()
2276 INIT_WORK(&aux->crc_work, drm_dp_aux_crc_work); in drm_dp_aux_init()
2278 aux->ddc.algo = &drm_dp_i2c_algo; in drm_dp_aux_init()
2279 aux->ddc.algo_data = aux; in drm_dp_aux_init()
2280 aux->ddc.retries = 3; in drm_dp_aux_init()
2282 aux->ddc.lock_ops = &drm_dp_i2c_lock_ops; in drm_dp_aux_init()
2287 * drm_dp_aux_register() - initialise and register aux channel
2317 WARN_ON_ONCE(!aux->drm_dev); in drm_dp_aux_register()
2319 if (!aux->ddc.algo) in drm_dp_aux_register()
2322 aux->ddc.owner = THIS_MODULE; in drm_dp_aux_register()
2323 aux->ddc.dev.parent = aux->dev; in drm_dp_aux_register()
2325 strscpy(aux->ddc.name, aux->name ? aux->name : dev_name(aux->dev), in drm_dp_aux_register()
2326 sizeof(aux->ddc.name)); in drm_dp_aux_register()
2332 ret = i2c_add_adapter(&aux->ddc); in drm_dp_aux_register()
2343 * drm_dp_aux_unregister() - unregister an AUX adapter
2349 i2c_del_adapter(&aux->ddc); in drm_dp_aux_unregister()
2356 * drm_dp_psr_setup_time() - PSR setup in time usec
2378 return -EINVAL; in drm_dp_psr_setup_time()
2387 * drm_dp_start_crc() - start capture of frame CRCs
2406 aux->crc_count = 0; in drm_dp_start_crc()
2407 aux->crtc = crtc; in drm_dp_start_crc()
2408 schedule_work(&aux->crc_work); in drm_dp_start_crc()
2415 * drm_dp_stop_crc() - stop capture of frame CRCs
2433 flush_work(&aux->crc_work); in drm_dp_stop_crc()
2434 aux->crtc = NULL; in drm_dp_stop_crc()
2456 /* LG LP140WF6-SPM1 eDP panel */
2493 if (quirk->is_branch != is_branch) in drm_dp_get_quirks()
2496 if (memcmp(quirk->oui, ident->oui, sizeof(ident->oui)) != 0) in drm_dp_get_quirks()
2499 if (memcmp(quirk->device_id, any_device, sizeof(any_device)) != 0 && in drm_dp_get_quirks()
2500 memcmp(quirk->device_id, ident->device_id, sizeof(ident->device_id)) != 0) in drm_dp_get_quirks()
2503 quirks |= quirk->quirks; in drm_dp_get_quirks()
2525 const struct drm_dp_dpcd_ident *ident = &desc->ident; in drm_dp_dump_desc()
2527 drm_dbg_kms(aux->drm_dev, in drm_dp_dump_desc()
2528 "%s: %s: OUI %*phD dev-ID %*pE HW-rev %d.%d SW-rev %d.%d quirks 0x%04x\n", in drm_dp_dump_desc()
2529 aux->name, device_name, in drm_dp_dump_desc()
2530 (int)sizeof(ident->oui), ident->oui, in drm_dp_dump_desc()
2531 (int)strnlen(ident->device_id, sizeof(ident->device_id)), ident->device_id, in drm_dp_dump_desc()
2532 ident->hw_rev >> 4, ident->hw_rev & 0xf, in drm_dp_dump_desc()
2533 ident->sw_major_rev, ident->sw_minor_rev, in drm_dp_dump_desc()
2534 desc->quirks); in drm_dp_dump_desc()
2538 * drm_dp_read_desc - read sink/branch descriptor from DPCD
2551 struct drm_dp_dpcd_ident *ident = &desc->ident; in drm_dp_read_desc()
2559 desc->quirks = drm_dp_get_quirks(ident, is_branch); in drm_dp_read_desc()
2568 * drm_dp_dump_lttpr_desc - read and dump the DPCD descriptor for an LTTPR PHY
2582 if (drm_WARN_ON(aux->drm_dev, dp_phy < DP_PHY_LTTPR1 || dp_phy > DP_MAX_LTTPR_COUNT)) in drm_dp_dump_lttpr_desc()
2583 return -EINVAL; in drm_dp_dump_lttpr_desc()
2596 * drm_dp_dsc_sink_bpp_incr() - Get bits per pixel increment
2603 u8 bpp_increment_dpcd = dsc_dpcd[DP_DSC_BITS_PER_PIXEL_INC - DP_DSC_SUPPORT]; in drm_dp_dsc_sink_bpp_incr()
2623 * drm_dp_dsc_sink_max_slice_count() - Get the max slice count
2641 u8 slice_cap1 = dsc_dpcd[DP_DSC_SLICE_CAP_1 - DP_DSC_SUPPORT]; in drm_dp_dsc_sink_max_slice_count()
2653 u8 slice_cap2 = dsc_dpcd[DP_DSC_SLICE_CAP_2 - DP_DSC_SUPPORT]; in drm_dp_dsc_sink_max_slice_count()
2682 * drm_dp_dsc_sink_line_buf_depth() - Get the line buffer depth in bits
2698 u8 line_buf_depth = dsc_dpcd[DP_DSC_LINE_BUF_BIT_DEPTH - DP_DSC_SUPPORT]; in drm_dp_dsc_sink_line_buf_depth()
2726 * drm_dp_dsc_sink_supported_input_bpcs() - Get all the input bits per component
2746 u8 color_depth = dsc_dpcd[DP_DSC_DEC_COLOR_DEPTH_CAP - DP_DSC_SUPPORT]; in drm_dp_dsc_sink_supported_input_bpcs()
2769 * corrupted values when reading from the 0xF0000- range with a block in drm_dp_read_lttpr_regs()
2790 * drm_dp_read_lttpr_common_caps - read the LTTPR common capabilities
2810 * drm_dp_read_lttpr_phy_caps - read the capabilities for a given LTTPR PHY
2833 return caps[r - DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV]; in dp_lttpr_common_cap()
2837 * drm_dp_lttpr_count - get the number of detected LTTPRs
2843 * -ERANGE if more than supported number (8) of LTTPRs are detected
2844 * -EINVAL if the DP_PHY_REPEATER_CNT register contains an invalid value
2855 return 8 - ilog2(count); in drm_dp_lttpr_count()
2857 return -ERANGE; in drm_dp_lttpr_count()
2859 return -EINVAL; in drm_dp_lttpr_count()
2865 * drm_dp_lttpr_max_link_rate - get the maximum link rate supported by all LTTPRs
2879 * drm_dp_lttpr_set_transparent_mode() - set the LTTPR in transparent mode
2894 return (ret == 1) ? 0 : -EIO; in drm_dp_lttpr_set_transparent_mode()
2899 * drm_dp_lttpr_init() - init LTTPR transparency mode according to DP standard
2902 * Negative error code for any non-valid number.
2916 * non-transparent mode and the disable->enable non-transparent mode in drm_dp_lttpr_init()
2924 return -ENODEV; in drm_dp_lttpr_init()
2928 * Roll-back to transparent mode if setting non-transparent in drm_dp_lttpr_init()
2932 return -EINVAL; in drm_dp_lttpr_init()
2940 * drm_dp_lttpr_max_lane_count - get the maximum lane count supported by all LTTPRs
2954 * drm_dp_lttpr_voltage_swing_level_3_supported - check for LTTPR vswing3 support
2970 * drm_dp_lttpr_pre_emphasis_level_3_supported - check for LTTPR preemph3 support
2974 * pre-emphasis level 3.
2986 * drm_dp_get_phy_test_pattern() - get the requested pattern from the sink.
3001 data->link_rate = drm_dp_bw_code_to_link_rate(rate); in drm_dp_get_phy_test_pattern()
3006 data->num_lanes = lanes & DP_MAX_LANE_COUNT_MASK; in drm_dp_get_phy_test_pattern()
3009 data->enhanced_frame_cap = true; in drm_dp_get_phy_test_pattern()
3011 err = drm_dp_dpcd_readb(aux, DP_PHY_TEST_PATTERN, &data->phy_pattern); in drm_dp_get_phy_test_pattern()
3015 switch (data->phy_pattern) { in drm_dp_get_phy_test_pattern()
3018 &data->custom80, sizeof(data->custom80)); in drm_dp_get_phy_test_pattern()
3025 &data->hbr2_reset, in drm_dp_get_phy_test_pattern()
3026 sizeof(data->hbr2_reset)); in drm_dp_get_phy_test_pattern()
3036 * drm_dp_set_phy_test_pattern() - set the pattern to the sink.
3049 test_pattern = data->phy_pattern; in drm_dp_set_phy_test_pattern()
3058 for (i = 0; i < data->num_lanes; i++) { in drm_dp_set_phy_test_pattern()
3152 return "DCI-P3"; in dp_colorimetry_get_name()
3229 vsc->revision, vsc->length); in drm_dp_vsc_sdp_log()
3231 dp_pixelformat_get_name(vsc->pixelformat)); in drm_dp_vsc_sdp_log()
3233 dp_colorimetry_get_name(vsc->pixelformat, vsc->colorimetry)); in drm_dp_vsc_sdp_log()
3234 drm_printf(p, " bpc: %u\n", vsc->bpc); in drm_dp_vsc_sdp_log()
3236 dp_dynamic_range_get_name(vsc->dynamic_range)); in drm_dp_vsc_sdp_log()
3238 dp_content_type_get_name(vsc->content_type)); in drm_dp_vsc_sdp_log()
3245 as_sdp->revision, as_sdp->length); in drm_dp_as_sdp_log()
3246 drm_printf(p, " vtotal: %d\n", as_sdp->vtotal); in drm_dp_as_sdp_log()
3247 drm_printf(p, " target_rr: %d\n", as_sdp->target_rr); in drm_dp_as_sdp_log()
3248 drm_printf(p, " duration_incr_ms: %d\n", as_sdp->duration_incr_ms); in drm_dp_as_sdp_log()
3249 drm_printf(p, " duration_decr_ms: %d\n", as_sdp->duration_decr_ms); in drm_dp_as_sdp_log()
3250 drm_printf(p, " operation_mode: %d\n", as_sdp->mode); in drm_dp_as_sdp_log()
3255 * drm_dp_as_sdp_supported() - check if adaptive sync sdp is supported
3270 drm_dbg_dp(aux->drm_dev, in drm_dp_as_sdp_supported()
3280 * drm_dp_vsc_sdp_supported() - check if vsc sdp is supported
3294 drm_dbg_dp(aux->drm_dev, "failed to read DP_DPRX_FEATURE_ENUMERATION_LIST\n"); in drm_dp_vsc_sdp_supported()
3303 * drm_dp_vsc_sdp_pack() - pack a given vsc sdp into generic dp_sdp
3305 * table 2-118 - table 2-120 in DP 1.4a specification
3318 * Prepare VSC Header for SU as per DP 1.4a spec, Table 2-119 in drm_dp_vsc_sdp_pack()
3321 sdp->sdp_header.HB0 = 0; /* Secondary-Data Packet ID = 0 */ in drm_dp_vsc_sdp_pack()
3322 sdp->sdp_header.HB1 = vsc->sdp_type; /* Secondary-data Packet Type */ in drm_dp_vsc_sdp_pack()
3323 sdp->sdp_header.HB2 = vsc->revision; /* Revision Number */ in drm_dp_vsc_sdp_pack()
3324 sdp->sdp_header.HB3 = vsc->length; /* Number of Valid Data Bytes */ in drm_dp_vsc_sdp_pack()
3326 if (vsc->revision == 0x6) { in drm_dp_vsc_sdp_pack()
3327 sdp->db[0] = 1; in drm_dp_vsc_sdp_pack()
3328 sdp->db[3] = 1; in drm_dp_vsc_sdp_pack()
3335 if (!(vsc->revision == 0x5 || vsc->revision == 0x7)) in drm_dp_vsc_sdp_pack()
3340 sdp->db[16] = (vsc->pixelformat & 0xf) << 4; /* DB16[7:4] */ in drm_dp_vsc_sdp_pack()
3341 sdp->db[16] |= vsc->colorimetry & 0xf; /* DB16[3:0] */ in drm_dp_vsc_sdp_pack()
3343 switch (vsc->bpc) { in drm_dp_vsc_sdp_pack()
3348 sdp->db[17] = 0x1; /* DB17[3:0] */ in drm_dp_vsc_sdp_pack()
3351 sdp->db[17] = 0x2; in drm_dp_vsc_sdp_pack()
3354 sdp->db[17] = 0x3; in drm_dp_vsc_sdp_pack()
3357 sdp->db[17] = 0x4; in drm_dp_vsc_sdp_pack()
3360 WARN(1, "Missing case %d\n", vsc->bpc); in drm_dp_vsc_sdp_pack()
3361 return -EINVAL; in drm_dp_vsc_sdp_pack()
3365 if (vsc->dynamic_range == DP_DYNAMIC_RANGE_CTA) in drm_dp_vsc_sdp_pack()
3366 sdp->db[17] |= 0x80; /* DB17[7] */ in drm_dp_vsc_sdp_pack()
3369 sdp->db[18] = vsc->content_type & 0x7; in drm_dp_vsc_sdp_pack()
3377 * drm_dp_get_pcon_max_frl_bw() - maximum frl supported by PCON
3416 * drm_dp_pcon_frl_prepare() - Prepare PCON for FRL.
3438 * drm_dp_pcon_is_frl_ready() - Is PCON ready for FRL
3460 * drm_dp_pcon_frl_configure_1() - Set HDMI LINK Configuration-Step1
3509 return -EINVAL; in drm_dp_pcon_frl_configure_1()
3521 * drm_dp_pcon_frl_configure_2() - Set HDMI Link configuration Step-2
3551 * drm_dp_pcon_reset_frl_config() - Re-Set HDMI Link configuration.
3569 * drm_dp_pcon_frl_enable() - Enable HDMI link through FRL
3583 drm_dbg_kms(aux->drm_dev, "%s: PCON in Autonomous mode, can't enable FRL\n", in drm_dp_pcon_frl_enable()
3584 aux->name); in drm_dp_pcon_frl_enable()
3585 return -EINVAL; in drm_dp_pcon_frl_enable()
3597 * drm_dp_pcon_hdmi_link_active() - check if the PCON HDMI LINK status is active.
3616 * drm_dp_pcon_hdmi_link_mode() - get the PCON HDMI LINK MODE
3646 * drm_dp_pcon_hdmi_frl_link_error_count() - print the error count per lane
3658 struct drm_hdmi_info *hdmi = &connector->display_info.hdmi; in drm_dp_pcon_hdmi_frl_link_error_count()
3660 for (i = 0; i < hdmi->max_lanes; i++) { in drm_dp_pcon_hdmi_frl_link_error_count()
3679 drm_err(aux->drm_dev, "%s: More than %d errors since the last read for lane %d", in drm_dp_pcon_hdmi_frl_link_error_count()
3680 aux->name, num_error, i); in drm_dp_pcon_hdmi_frl_link_error_count()
3686 * drm_dp_pcon_enc_is_dsc_1_2 - Does PCON Encoder supports DSC 1.2
3696 buf = pcon_dsc_dpcd[DP_PCON_DSC_VERSION - DP_PCON_DSC_ENCODER]; in drm_dp_pcon_enc_is_dsc_1_2()
3708 * drm_dp_pcon_dsc_max_slices - Get max slices supported by PCON DSC Encoder
3717 slice_cap1 = pcon_dsc_dpcd[DP_PCON_DSC_SLICE_CAP_1 - DP_PCON_DSC_ENCODER]; in drm_dp_pcon_dsc_max_slices()
3718 slice_cap2 = pcon_dsc_dpcd[DP_PCON_DSC_SLICE_CAP_2 - DP_PCON_DSC_ENCODER]; in drm_dp_pcon_dsc_max_slices()
3746 * drm_dp_pcon_dsc_max_slice_width() - Get max slice width for Pcon DSC encoder
3755 buf = pcon_dsc_dpcd[DP_PCON_DSC_MAX_SLICE_WIDTH - DP_PCON_DSC_ENCODER]; in drm_dp_pcon_dsc_max_slice_width()
3762 * drm_dp_pcon_dsc_bpp_incr() - Get bits per pixel increment for PCON DSC encoder
3771 buf = pcon_dsc_dpcd[DP_PCON_DSC_BPP_INCR - DP_PCON_DSC_ENCODER]; in drm_dp_pcon_dsc_bpp_incr()
3815 * drm_dp_pcon_pps_default() - Let PCON fill the default pps parameters
3834 * drm_dp_pcon_pps_override_buf() - Configure PPS encoder override buffer for
3858 * drm_dp_pcon_pps_override_param() - Write PPS parameters to DSC encoder
3889 * drm_dp_pcon_convert_rgb_to_ycbcr() - Configure the PCon to convert RGB to Ycbcr
3891 * @color_spc: Color-space/s for which conversion is to be enabled, 0 for disable.
3918 * drm_edp_backlight_set_level() - Set the backlight level of an eDP panel via AUX
3935 if (!bl->aux_set) in drm_edp_backlight_set_level()
3938 if (bl->lsb_reg_used) { in drm_edp_backlight_set_level()
3947 drm_err(aux->drm_dev, in drm_edp_backlight_set_level()
3949 aux->name, ret); in drm_edp_backlight_set_level()
3950 return ret < 0 ? ret : -EIO; in drm_edp_backlight_set_level()
3965 if (!bl->aux_enable) in drm_edp_backlight_set_enable()
3970 drm_err(aux->drm_dev, "%s: Failed to read eDP display control register: %d\n", in drm_edp_backlight_set_enable()
3971 aux->name, ret); in drm_edp_backlight_set_enable()
3972 return ret < 0 ? ret : -EIO; in drm_edp_backlight_set_enable()
3981 drm_err(aux->drm_dev, "%s: Failed to write eDP display control register: %d\n", in drm_edp_backlight_set_enable()
3982 aux->name, ret); in drm_edp_backlight_set_enable()
3983 return ret < 0 ? ret : -EIO; in drm_edp_backlight_set_enable()
3990 * drm_edp_backlight_enable() - Enable an eDP panel's backlight using DPCD
4000 * that the driver handle enabling/disabling the panel through implementation-specific means using
4002 * this function becomes a no-op, and the driver is expected to handle powering the panel on using
4013 if (bl->aux_set) in drm_edp_backlight_enable()
4018 if (bl->pwmgen_bit_count) { in drm_edp_backlight_enable()
4019 ret = drm_dp_dpcd_writeb(aux, DP_EDP_PWMGEN_BIT_COUNT, bl->pwmgen_bit_count); in drm_edp_backlight_enable()
4021 drm_dbg_kms(aux->drm_dev, "%s: Failed to write aux pwmgen bit count: %d\n", in drm_edp_backlight_enable()
4022 aux->name, ret); in drm_edp_backlight_enable()
4025 if (bl->pwm_freq_pre_divider) { in drm_edp_backlight_enable()
4026 ret = drm_dp_dpcd_writeb(aux, DP_EDP_BACKLIGHT_FREQ_SET, bl->pwm_freq_pre_divider); in drm_edp_backlight_enable()
4028 drm_dbg_kms(aux->drm_dev, in drm_edp_backlight_enable()
4030 aux->name, ret); in drm_edp_backlight_enable()
4037 drm_dbg_kms(aux->drm_dev, "%s: Failed to write aux backlight mode: %d\n", in drm_edp_backlight_enable()
4038 aux->name, ret); in drm_edp_backlight_enable()
4039 return ret < 0 ? ret : -EIO; in drm_edp_backlight_enable()
4054 * drm_edp_backlight_disable() - Disable an eDP backlight using DPCD, if supported
4061 * that the driver handle enabling/disabling the panel through implementation-specific means using
4063 * this function becomes a no-op, and the driver is expected to handle powering the panel off using
4066 * Returns: %0 on success or no-op, negative error code on failure.
4088 if (!bl->aux_set) in drm_edp_backlight_probe_max()
4093 drm_dbg_kms(aux->drm_dev, "%s: Failed to read pwmgen bit count cap: %d\n", in drm_edp_backlight_probe_max()
4094 aux->name, ret); in drm_edp_backlight_probe_max()
4095 return -ENODEV; in drm_edp_backlight_probe_max()
4099 bl->max = (1 << pn) - 1; in drm_edp_backlight_probe_max()
4106 * - Where F = PWM Frequency Pre-Divider value programmed by field 7:0 of the in drm_edp_backlight_probe_max()
4108 * - Where P = 2^Pn, where Pn is the value programmed by field 4:0 of the in drm_edp_backlight_probe_max()
4120 * - Pn is in the range of Pn_min and Pn_max in drm_edp_backlight_probe_max()
4121 * - F is in the range of 1 and 255 in drm_edp_backlight_probe_max()
4122 * - FxP is within 25% of desired value. in drm_edp_backlight_probe_max()
4127 drm_dbg_kms(aux->drm_dev, "%s: Failed to read pwmgen bit count cap min: %d\n", in drm_edp_backlight_probe_max()
4128 aux->name, ret); in drm_edp_backlight_probe_max()
4133 drm_dbg_kms(aux->drm_dev, "%s: Failed to read pwmgen bit count cap max: %d\n", in drm_edp_backlight_probe_max()
4134 aux->name, ret); in drm_edp_backlight_probe_max()
4144 drm_dbg_kms(aux->drm_dev, in drm_edp_backlight_probe_max()
4146 aux->name, driver_pwm_freq_hz); in drm_edp_backlight_probe_max()
4150 for (pn = pn_max; pn >= pn_min; pn--) { in drm_edp_backlight_probe_max()
4159 drm_dbg_kms(aux->drm_dev, "%s: Failed to write aux pwmgen bit count: %d\n", in drm_edp_backlight_probe_max()
4160 aux->name, ret); in drm_edp_backlight_probe_max()
4163 bl->pwmgen_bit_count = pn; in drm_edp_backlight_probe_max()
4164 bl->max = (1 << pn) - 1; in drm_edp_backlight_probe_max()
4167 bl->pwm_freq_pre_divider = f; in drm_edp_backlight_probe_max()
4168 drm_dbg_kms(aux->drm_dev, "%s: Using backlight frequency from driver (%dHz)\n", in drm_edp_backlight_probe_max()
4169 aux->name, driver_pwm_freq_hz); in drm_edp_backlight_probe_max()
4185 drm_dbg_kms(aux->drm_dev, "%s: Failed to read backlight mode: %d\n", in drm_edp_backlight_probe_state()
4186 aux->name, ret); in drm_edp_backlight_probe_state()
4187 return ret < 0 ? ret : -EIO; in drm_edp_backlight_probe_state()
4191 if (!bl->aux_set) in drm_edp_backlight_probe_state()
4195 int size = 1 + bl->lsb_reg_used; in drm_edp_backlight_probe_state()
4199 drm_dbg_kms(aux->drm_dev, "%s: Failed to read backlight level: %d\n", in drm_edp_backlight_probe_state()
4200 aux->name, ret); in drm_edp_backlight_probe_state()
4201 return ret < 0 ? ret : -EIO; in drm_edp_backlight_probe_state()
4204 if (bl->lsb_reg_used) in drm_edp_backlight_probe_state()
4214 return bl->max; in drm_edp_backlight_probe_state()
4218 * drm_edp_backlight_init() - Probe a display panel's TCON using the standard VESA eDP backlight
4230 * If @driver_pwm_freq_hz is non-zero, this will be used as the backlight frequency. Otherwise, the
4243 bl->aux_enable = true; in drm_edp_backlight_init()
4245 bl->aux_set = true; in drm_edp_backlight_init()
4247 bl->lsb_reg_used = true; in drm_edp_backlight_init()
4250 if (!bl->aux_set && !(edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP)) { in drm_edp_backlight_init()
4251 drm_dbg_kms(aux->drm_dev, in drm_edp_backlight_init()
4253 aux->name); in drm_edp_backlight_init()
4254 return -EINVAL; in drm_edp_backlight_init()
4266 drm_dbg_kms(aux->drm_dev, in drm_edp_backlight_init()
4268 aux->name, bl->aux_set, bl->aux_enable, *current_mode); in drm_edp_backlight_init()
4269 if (bl->aux_set) { in drm_edp_backlight_init()
4270 drm_dbg_kms(aux->drm_dev, in drm_edp_backlight_init()
4272 aux->name, *current_level, bl->max, bl->pwm_freq_pre_divider, in drm_edp_backlight_init()
4273 bl->lsb_reg_used); in drm_edp_backlight_init()
4290 if (!bl->enabled) { in dp_aux_backlight_update_status()
4291 drm_edp_backlight_enable(bl->aux, &bl->info, brightness); in dp_aux_backlight_update_status()
4292 bl->enabled = true; in dp_aux_backlight_update_status()
4295 ret = drm_edp_backlight_set_level(bl->aux, &bl->info, brightness); in dp_aux_backlight_update_status()
4297 if (bl->enabled) { in dp_aux_backlight_update_status()
4298 drm_edp_backlight_disable(bl->aux, &bl->info); in dp_aux_backlight_update_status()
4299 bl->enabled = false; in dp_aux_backlight_update_status()
4311 * drm_panel_dp_aux_backlight - create and use DP AUX backlight
4343 if (!panel || !panel->dev || !aux) in drm_panel_dp_aux_backlight()
4344 return -EINVAL; in drm_panel_dp_aux_backlight()
4352 DRM_DEV_INFO(panel->dev, "DP AUX backlight is not supported\n"); in drm_panel_dp_aux_backlight()
4356 bl = devm_kzalloc(panel->dev, sizeof(*bl), GFP_KERNEL); in drm_panel_dp_aux_backlight()
4358 return -ENOMEM; in drm_panel_dp_aux_backlight()
4360 bl->aux = aux; in drm_panel_dp_aux_backlight()
4362 ret = drm_edp_backlight_init(aux, &bl->info, 0, edp_dpcd, in drm_panel_dp_aux_backlight()
4369 props.max_brightness = bl->info.max; in drm_panel_dp_aux_backlight()
4371 bl->base = devm_backlight_device_register(panel->dev, "dp_aux_backlight", in drm_panel_dp_aux_backlight()
4372 panel->dev, bl, in drm_panel_dp_aux_backlight()
4374 if (IS_ERR(bl->base)) in drm_panel_dp_aux_backlight()
4375 return PTR_ERR(bl->base); in drm_panel_dp_aux_backlight()
4377 backlight_disable(bl->base); in drm_panel_dp_aux_backlight()
4379 panel->backlight = bl->base; in drm_panel_dp_aux_backlight()
4409 * drm_dp_bw_overhead - Calculate the BW overhead of a DP link stream
4418 * - @lane_count
4419 * - SST/MST mode (@flags / %DRM_DP_OVERHEAD_MST)
4420 * - symbol size (@flags / %DRM_DP_OVERHEAD_UHBR)
4421 * - FEC mode (@flags / %DRM_DP_OVERHEAD_FEC)
4422 * - SSC/REF_CLK mode (@flags / %DRM_DP_OVERHEAD_SSC_REF_CLK)
4424 * - @hactive timing
4425 * - @bpp_x16 color depth
4426 * - compression mode (@flags / %DRM_DP_OVERHEAD_DSC).
4451 * SSC downspread and ref clock variation margin: in drm_dp_bw_overhead()
4460 * After each 250 data symbols on 2-4 lanes: in drm_dp_bw_overhead()
4461 * 250 LL + 5 FEC_PARITY_PH + 1 CD_ADJ (256 byte FEC block) in drm_dp_bw_overhead()
4463 * 2 * 250 LL + 11 FEC_PARITY_PH + 1 CD_ADJ (512 byte FEC block) in drm_dp_bw_overhead()
4464 * After 256 (2-4 lanes) or 128 (1 lane) FEC blocks: in drm_dp_bw_overhead()
4498 * drm_dp_bw_channel_coding_efficiency - Get a DP link's channel coding efficiency
4503 * the 8b -> 10b, 128b -> 132b pixel data to link symbol conversion overhead
4509 * Returns the efficiency in the 100%/coding-overhead% ratio in
4527 * drm_dp_max_dprx_data_rate - Get the max data bandwidth of a DPRX sink
4539 * the whole MST path until the DPRX link) and (Thunderbolt) DP tunnels -
4540 * which in turn can encapsulate an MST link with its own limit - with each