pm/inc/amdgpu_dpm.h

27 enum gfx_change_state {
32 enum amdgpu_int_thermal_type {
48 enum amdgpu_runpm_mode {
70 	enum amd_vce_level vce_level;
257 	enum amd_vce_level vce_level;
258 	enum amd_pm_state_type state;
259 	enum amd_pm_state_type user_state;
260 	enum amd_pm_state_type last_state;
261 	enum amd_pm_state_type last_user_state;
288 	enum amd_dpm_forced_level forced_level;
291 enum ip_power_state {
346 	enum amdgpu_int_thermal_type int_thermal_type;
388 	enum amdgpu_runpm_mode rpm_mode;
394 int amdgpu_dpm_read_sensor(struct amdgpu_device *adev, enum amd_pp_sensors sensor,
411 				    enum PP_SMC_POWER_PROFILE type,
427 			     enum pp_mp1_state mp1_state);
462 				       enum pp_clock_type type,
466 				        enum pp_clock_type type,
470 int amdgpu_dpm_wait_for_event(struct amdgpu_device *adev, enum smu_event_type event,
478 				 enum gfx_change_state state);
483 void amdgpu_dpm_get_current_power_state(struct amdgpu_device *adev, enum amd_pm_state_type *state);
485 				enum amd_pm_state_type state);
486 enum amd_dpm_forced_level amdgpu_dpm_get_performance_level(struct amdgpu_device *adev);
488 				       enum amd_dpm_forced_level level);
492 			      enum amd_pp_task task_id,
493 			      enum amd_pm_state_type *user_state);
504 				  enum pp_clock_type type,
507 				  enum pp_clock_type type,
514 				 enum pp_clock_type type,
551 			       enum pp_power_limit_level pp_limit_level,
552 			       enum pp_power_type power_type);
570 				 enum amd_pp_clock_type type,
575 					      enum amd_pp_clock_type type,
578 					      enum amd_pp_clock_type type,
599 enum pp_smu_status amdgpu_dpm_get_uclk_dpm_states(struct amdgpu_device *adev,
607 				      enum pp_pm_policy p_type, char *buf);