72 #define DMUB_CW0_BASE (0x60000000)
73 #define DMUB_CW1_BASE (0x61000000)
74 #define DMUB_CW3_BASE (0x63000000)
75 #define DMUB_CW4_BASE (0x64000000)
76 #define DMUB_CW5_BASE (0x65000000)
77 #define DMUB_CW6_BASE (0x66000000)
79 #define DMUB_REGION5_BASE (0xA0000000)
80 #define DMUB_REGION6_BASE (0xC0000000)
102 	for (pos = 0; pos < end; pos += sizeof(buf))  in dmub_flush_buffer_mem()
144 		for (i = 0; i < 16; ++i) {  in dmub_get_fw_meta_info()
422 	dmub_memset(dmub, 0, sizeof(*dmub));  in dmub_srv_create()
469 	dmub_memset(dmub, 0, sizeof(*dmub));  in dmub_srv_destroy()
477 	uint32_t i, top = 0;  in dmub_srv_calc_regions_for_memory_type()
479 	for (i = 0; i < DMUB_WINDOW_TOTAL; ++i) {  in dmub_srv_calc_regions_for_memory_type()
501 	uint32_t window_sizes[DMUB_WINDOW_TOTAL] = { 0 };  in dmub_srv_calc_region_info()
506 	memset(out, 0, sizeof(*out));  in dmub_srv_calc_region_info()
507 	memset(window_sizes, 0, sizeof(window_sizes));  in dmub_srv_calc_region_info()
527 		if (dmub->fw_version == 0)  in dmub_srv_calc_region_info()
559 	memset(out, 0, sizeof(*out));  in dmub_srv_calc_mem_info()
564 	for (i = 0; i < DMUB_NUM_WINDOWS; ++i) {  in dmub_srv_calc_mem_info()
636 		ASSERT(0);  in dmub_srv_hw_init()
648 	dmub->inbox1_last_wptr = 0;  in dmub_srv_hw_init()
736 	dmub_memset(&rb_params, 0, sizeof(rb_params));  in dmub_srv_hw_init()
748 	dmub_memset(&outbox0_rb_params, 0, sizeof(outbox0_rb_params));  in dmub_srv_hw_init()
801 	dmub->inbox1_last_wptr = 0;  in dmub_srv_hw_reset()
802 	dmub->inbox1_rb.wrpt = 0;  in dmub_srv_hw_reset()
803 	dmub->inbox1_rb.rptr = 0;  in dmub_srv_hw_reset()
804 	dmub->outbox0_rb.wrpt = 0;  in dmub_srv_hw_reset()
805 	dmub->outbox0_rb.rptr = 0;  in dmub_srv_hw_reset()
806 	dmub->outbox1_rb.wrpt = 0;  in dmub_srv_hw_reset()
807 	dmub->outbox1_rb.rptr = 0;  in dmub_srv_hw_reset()
879 	for (i = 0; i <= timeout_us; i += 100) {  in dmub_srv_wait_for_hw_pwr_up()
898 	for (i = 0; i <= timeout_us; i += 100) {  in dmub_srv_wait_for_auto_load()
921 	for (i = 0; i <= timeout_us; ++i) {  in dmub_srv_wait_for_idle()
961 	for (i = 0; i < timeout_us; ++i) {  in dmub_srv_send_gpint_command()
974 	*response = 0;  in dmub_srv_get_gpint_response()
990 	*dataout = 0;  in dmub_srv_get_gpint_dataout()
1006 	status->all = 0;  in dmub_srv_get_fw_boot_status()
1020 	option->all = 0;  in dmub_srv_get_fw_boot_option()
1085 	for (i = 0; i < loop_count; i++)  in dmub_rb_out_trace_buffer_front()
1129 	uint32_t i = 0;  in dmub_srv_wait_for_inbox0_ack()
1130 	uint32_t ack = 0;  in dmub_srv_wait_for_inbox0_ack()
1135 	for (i = 0; i <= timeout_us; i++) {  in dmub_srv_wait_for_inbox0_ack()
1169 	uint32_t rsp_ready = 0;  in dmub_srv_send_reg_inbox0_cmd()
1174 	for (i = 0; i < timeout_us; i++) {  in dmub_srv_send_reg_inbox0_cmd()
1180 	if (rsp_ready == 0)  in dmub_srv_send_reg_inbox0_cmd()
1191 		if (rsp_ready == 0)  in dmub_srv_send_reg_inbox0_cmd()
1195 	ASSERT(rsp_ready == 0);  in dmub_srv_send_reg_inbox0_cmd()