display/dc/dc.h

2  * Copyright 2012-2023 Advanced Micro Devices, Inc.
59  * MAX_SURFACES - representative of the upper bound of surfaces that can be piped to a single CRTC
63  * MAX_PLANES - representative of the upper bound of planes that are supported by the HW
112 	// for example, 1080p -> 8K is 4.0, or 4000 raw value
120 	// for example, 8K -> 1080p is 0.25, or 250 raw value
132  * DOC: color-management-caps
137  * abstracted HW. DCE 5-12 had almost no important changes, but starting with
144  * struct rom_curve_caps - predefined transfer function caps for degamma and regamma
160  * struct dpp_color_caps - color pipeline capabilities for display pipe and
165  * just plain 256-entry lookup
174  * @dgam_rom_for_yuv: pre-defined degamma LUT for YUV planes
175  * @dgam_rom_caps: pre-definied curve caps for degamma 1D LUT
176  * @ogam_rom_caps: pre-definied curve caps for regamma 1D LUT
196  * struct mpc_color_caps - color pipeline capabilities for multiple pipe and
205  * @ogam_rom_caps: pre-definied curve caps for regamma 1D LUT
217  * struct dc_color_caps - color pipes capabilities for DPP and MPC hw blocks
388  * re-programming however do not affect bandwidth consumption or clock
527 	INGAME_FAMS_SINGLE_DISP_ENABLE, // enable in-game fams
528 	INGAME_FAMS_DISABLE, // disable in-game fams
529 	INGAME_FAMS_MULTI_DISP_ENABLE, //enable in-game fams for multi-display
530 …INGAME_FAMS_MULTI_DISP_CLAMPED_ONLY, //enable in-game fams for multi-display only for clamped RR s…
534  * enum pipe_split_policy - Pipe split strategy supported by DCN
542 	 * pipe in order to bring the best trade-off between performance and
574 	DCN_PWR_STATE_UNKNOWN = -1,
589  * struct dc_clocks - DC pipe clocks
662 		unsigned long long start_tick = dc->debug.bw_val_profile.enable ? \
663 				dm_get_timestamp(dc->ctx) : 0
666 		if (dc->debug.bw_val_profile.enable) \
667 			dc->debug.bw_val_profile.total_count++
670 		if (dc->debug.bw_val_profile.enable) { \
672 				voltage_level_tick = dm_get_timestamp(dc->ctx); \
673 			dc->debug.bw_val_profile.skip_ ## status ## _count++; \
677 		if (dc->debug.bw_val_profile.enable) \
678 			voltage_level_tick = dm_get_timestamp(dc->ctx)
681 		if (dc->debug.bw_val_profile.enable) \
682 			watermark_tick = dm_get_timestamp(dc->ctx)
685 		if (dc->debug.bw_val_profile.enable) { \
686 			end_tick = dm_get_timestamp(dc->ctx); \
687 			dc->debug.bw_val_profile.total_ticks += end_tick - start_tick; \
688 			dc->debug.bw_val_profile.voltage_level_ticks += voltage_level_tick - start_tick; \
690 				dc->debug.bw_val_profile.watermark_ticks += watermark_tick - voltage_level_tick; \
691 				dc->debug.bw_val_profile.rq_dlg_ticks += end_tick - watermark_tick; \
698 		bool i2c: 1;  member
796  * 15-2: reserved
797  * 31-16: timeout in ms
870  * struct dc_debug_options - DC debug struct
980 	/* TODO - remove once tested */
1536 	 * Color Transformations for pre-blend MCM (Shaper, 3DLUT, 1DLUT)
1568  * struct dc_validation_set - Struct to store surface/stream associations for validation
1647  * return - minimum required timing bandwidth in kbps.
1656  * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
1729 	 * Pending allows link HWSS to differentiate PHY vs non-PHY pattern,
1733 	 * pending_test_pattern will be invalid or contain a non-PHY test pattern
1849  * @reason - Indicate which event triggers this detection. dc may customize
1851  * return false - if detection is not fully completed. This could happen when
1854  * link->connection_type == dc_connection_mst_branch when returning false).
1855  * return true - detection is completed, link has been fully updated with latest
1867  * @dc_link - link the remote sink will be added to.
1868  * @edid - byte array of EDID raw data.
1869  * @len - size of the edid in byte
1870  * @init_data -
1879  * @link - link the sink should be removed from
1880  * @sink - sink to be removed.
1894  * @type - dc_connection_single if connected, dc_connection_none otherwise.
1895  * return - false if an unexpected error occurs, true otherwise.
1906  * return - true HPD is asserted (HPD high), false otherwise (HPD low)
1916  * @link - The link the HPD pin is associated with.
1917  * @enable = true - enable hardware HPD filter. HPD event will only queued to irq
1924  * @enable = false - disable hardware HPD filter. HPD event will be queued
1930 /* submit i2c read/write payloads through ddc channel
1931  * @link_index - index to a link with ddc in i2c mode
1932  * @cmd - i2c command structure
1933  * return - true if success, false otherwise.
1940 /* submit i2c read/write payloads through oem channel
1941  * @link_index - index to a link with ddc in i2c mode
1942  * @cmd - i2c command structure
1943  * return - true if success, false otherwise.
1951  * retries or handle error states. The reply is returned in the payload->reply
1953  * transferred,or -1 on a failure.
1973  * TODO - When defer_handling is true the function will have a different purpose.
1978  * true - Downstream port status changed. DM should call DC to do the
1980  * false - no change in Downstream port status. No further action required
1995  * return true - hpd rx irq should be handled.
1996  * return false - it is safe to ignore hpd rx irq event
2001  * @link - link the hpd irq data associated with
2002  * @hpd_irq_dpcd_data - input hpd irq data
2003  * return - true if hpd irq data indicates a link lost
2009  * @link - link where the hpd irq data should be read from
2010  * @irq_data - output hpd irq data
2011  * return - DC_OK if hpd irq data is read successfully, otherwise hpd irq data
2021  * TODO - in the future we should consider to expand link resume interface to
2027 /* Destruct the mst topology of the link and reset the allocated payload table
2030  * still wants to reset MST topology on an unplug event */
2036  * return - total effective link bandwidth in kbps.
2054  * return - min hblank size in bytes, 0 if 8b/10b SST.
2094  * interface i.e stream_update->dsc_config
2102  * @link - current detected link
2103  * @req_bw - requested bandwidth in kbps
2104  * @link_settings - returned most optimal link settings that can fit the
2106  * return - false if link can't support requested bandwidth, true if link
2122  * @link -  a link with DP RX connection
2123  * return - if stream is committed to this link with MST signal type, type of
2132  * @link - a link with DP RX connection
2133  * return - max dp link settings the link can enable.
2141  * @link - a link with DP RX connection
2142  * return - highest encoding format link supports.
2148  * @link - a link with dp connector signal type
2149  * return - true if connected, false otherwise
2153 /* Force DP lane settings update to main-link video signal and notify the change
2158  * @lt_settings - a container structure with desired hw_lane_settings
2165  * test or debugging purpose. The test pattern will remain until next un-plug.
2167  * @link - active link with DP signal output enabled.
2168  * @test_pattern - desired test pattern to output.
2170  * @test_pattern_color_space - for video test pattern choose a desired color
2172  * @p_link_settings - For PHY pattern choose a desired link settings
2173  * @p_custom_pattern - some test pattern will require a custom input to
2175  * @cust_pattern_size - size of the custom pattern input.
2200  * @link_settings - if not NULL, force preferred link settings to the link.
2201  * @lt_override - a set of override pointers. If any pointer is none NULL, dc
2213 /* return - true if FEC is supported with connected DP RX, false otherwise */
2218  * return - true if FEC should be enabled, false otherwise.
2229  * NOTE: this interface doesn't update dp main-link. Calling this function will
2230  * cause DP TX main-link and DP RX power states out of sync. DM has to restore
2233  * @on - true to set DP RX in D0 power state, false to set DP RX in D3 power
2238 /* Force link to read base dp receiver caps from dpcd 000h - 00Fh and overwrite
2239  * current value read from extended receiver cap from 02200h - 0220Fh.
2256 /* Set/get nits-based backlight level of an embedded panel (eDP, LVDS). */
2302  * return - true if trace is initialized and has valid data. False dp trace
2323  * @in_detection - true to get link training end time stamp of last link
2331  * @in_detection - true to get link training count of last link
2345  * Send a request from DP-Tx requesting to allocate BW remotely after
2359  * Unplug => de-allocate bw
2381 /* Sink Interfaces - A sink corresponds to a display output device */
2386 	// 8 byte port ID -> ELD.PortID
2388 	// 128bit GUID in binary formufacturer name -> ELD.ManufacturerName
2390 	// 2 byte product code -> ELD.ProductCode
2396 	// 'true' if these are virtual DPCD's DSC caps (immediately upstream of sink in MST topology),
2399 	// 'true' if MST topology supports DSC passthrough for sink
2400 	// 'false' if MST topology does not support DSC passthrough
2406 …' if these are virtual DPCD's HBlank expansion caps (immediately upstream of sink in MST topology),