Lines Matching defs:var
35 var SQ_WAVE_STATE_PRIV_BARRIER_COMPLETE_MASK = 0x4 label
36 var SQ_WAVE_STATE_PRIV_SCC_SHIFT = 9 label
37 var SQ_WAVE_STATE_PRIV_SYS_PRIO_MASK = 0xC00 label
38 var SQ_WAVE_STATE_PRIV_HALT_MASK = 0x4000 label
39 var SQ_WAVE_STATE_PRIV_POISON_ERR_MASK = 0x8000 label
40 var SQ_WAVE_STATE_PRIV_POISON_ERR_SHIFT = 15 label
41 var SQ_WAVE_STATUS_WAVE64_SHIFT = 29 label
42 var SQ_WAVE_STATUS_WAVE64_SIZE = 1 label
43 var SQ_WAVE_STATUS_NO_VGPRS_SHIFT = 24 label
44 var SQ_WAVE_STATE_PRIV_ALWAYS_CLEAR_MASK = SQ_WAVE_STATE_PRIV_SYS_PRIO_MASK|SQ_WAVE_STATE_PRIV_POIS… label
45 var S_SAVE_PC_HI_TRAP_ID_MASK = 0xF0000000 label
47 var SQ_WAVE_LDS_ALLOC_LDS_SIZE_SHIFT = 12 label
48 var SQ_WAVE_LDS_ALLOC_LDS_SIZE_SIZE = 9 label
49 var SQ_WAVE_GPR_ALLOC_VGPR_SIZE_SIZE = 8 label
50 var SQ_WAVE_GPR_ALLOC_VGPR_SIZE_SHIFT = 12 label
51 var SQ_WAVE_LDS_ALLOC_VGPR_SHARED_SIZE_SHIFT = 24 label
52 var SQ_WAVE_LDS_ALLOC_VGPR_SHARED_SIZE_SIZE = 4 label
53 var SQ_WAVE_LDS_ALLOC_GRANULARITY = 9 label
55 var SQ_WAVE_EXCP_FLAG_PRIV_ADDR_WATCH_MASK = 0xF label
56 var SQ_WAVE_EXCP_FLAG_PRIV_MEM_VIOL_MASK = 0x10 label
57 var SQ_WAVE_EXCP_FLAG_PRIV_SAVE_CONTEXT_SHIFT = 5 label
58 var SQ_WAVE_EXCP_FLAG_PRIV_SAVE_CONTEXT_MASK = 0x20 label
59 var SQ_WAVE_EXCP_FLAG_PRIV_ILLEGAL_INST_MASK = 0x40 label
60 var SQ_WAVE_EXCP_FLAG_PRIV_ILLEGAL_INST_SHIFT = 6 label
61 var SQ_WAVE_EXCP_FLAG_PRIV_HOST_TRAP_MASK = 0x80 label
62 var SQ_WAVE_EXCP_FLAG_PRIV_HOST_TRAP_SHIFT = 7 label
63 var SQ_WAVE_EXCP_FLAG_PRIV_WAVE_START_MASK = 0x100 label
64 var SQ_WAVE_EXCP_FLAG_PRIV_WAVE_START_SHIFT = 8 label
65 var SQ_WAVE_EXCP_FLAG_PRIV_WAVE_END_MASK = 0x200 label
66 var SQ_WAVE_EXCP_FLAG_PRIV_TRAP_AFTER_INST_MASK = 0x800 label
67 var SQ_WAVE_TRAP_CTRL_ADDR_WATCH_MASK = 0x80 label
68 var SQ_WAVE_TRAP_CTRL_TRAP_AFTER_INST_MASK = 0x200 label
75 SQ_WAVE_EXCP_FLAG_PRIV_TRAP_AFTER_INST_MASK
76 var SQ_WAVE_EXCP_FLAG_PRIV_RESTORE_PART_1_SIZE = SQ_WAVE_EXCP_FLAG_PRIV_SAVE_CONTEXT_SHIFT label
77 var SQ_WAVE_EXCP_FLAG_PRIV_RESTORE_PART_2_SHIFT = SQ_WAVE_EXCP_FLAG_PRIV_ILLEGAL_INST_SHIFT label
78 var SQ_WAVE_EXCP_FLAG_PRIV_RESTORE_PART_2_SIZE = SQ_WAVE_EXCP_FLAG_PRIV_HOST_TRAP_SHIFT - SQ_WAVE_E… label
79 var SQ_WAVE_EXCP_FLAG_PRIV_RESTORE_PART_3_SHIFT = SQ_WAVE_EXCP_FLAG_PRIV_WAVE_START_SHIFT label
80 var SQ_WAVE_EXCP_FLAG_PRIV_RESTORE_PART_3_SIZE = 32 - SQ_WAVE_EXCP_FLAG_PRIV_RESTORE_PART_3_SHIFT label
81 var BARRIER_STATE_SIGNAL_OFFSET = 16 label
82 var BARRIER_STATE_VALID_OFFSET = 0 label
84 var TTMP11_DEBUG_TRAP_ENABLED_SHIFT = 23 label
85 var TTMP11_DEBUG_TRAP_ENABLED_MASK = 0x800000 label
89 var S_SAVE_BUF_RSRC_WORD1_STRIDE = 0x00040000 label
90 var S_SAVE_BUF_RSRC_WORD3_MISC = 0x10807FAC label
91 var S_SAVE_SPI_INIT_FIRST_WAVE_MASK = 0x04000000 label
92 var S_SAVE_SPI_INIT_FIRST_WAVE_SHIFT = 26 label
94 var S_SAVE_PC_HI_FIRST_WAVE_MASK = 0x80000000 label
95 var S_SAVE_PC_HI_FIRST_WAVE_SHIFT = 31 label
97 var s_sgpr_save_num = 108 label
99 var s_save_spi_init_lo = exec_lo label
100 var s_save_spi_init_hi = exec_hi label
101 var s_save_pc_lo = ttmp0 label
102 var s_save_pc_hi = ttmp1 label
103 var s_save_exec_lo = ttmp2 label
104 var s_save_exec_hi = ttmp3 label
105 var s_save_state_priv = ttmp12 label
106 var s_save_excp_flag_priv = ttmp15 label
107 var s_save_xnack_mask = s_save_excp_flag_priv label
108 var s_wave_size = ttmp7 label
109 var s_save_buf_rsrc0 = ttmp8 label
110 var s_save_buf_rsrc1 = ttmp9 label
111 var s_save_buf_rsrc2 = ttmp10 label
112 var s_save_buf_rsrc3 = ttmp11 label
113 var s_save_mem_offset = ttmp4 label
114 var s_save_alloc_size = s_save_excp_flag_priv label
115 var s_save_tmp = ttmp14 label
116 var s_save_m0 = ttmp5 label
117 var s_save_ttmps_lo = s_save_tmp label
118 var s_save_ttmps_hi = s_save_excp_flag_priv label
120 var S_RESTORE_BUF_RSRC_WORD1_STRIDE = S_SAVE_BUF_RSRC_WORD1_STRIDE label
121 var S_RESTORE_BUF_RSRC_WORD3_MISC = S_SAVE_BUF_RSRC_WORD3_MISC label
123 var S_RESTORE_SPI_INIT_FIRST_WAVE_MASK = 0x04000000 label
124 var S_RESTORE_SPI_INIT_FIRST_WAVE_SHIFT = 26 label
125 var S_WAVE_SIZE = 25 label
127 var s_restore_spi_init_lo = exec_lo label
128 var s_restore_spi_init_hi = exec_hi label
129 var s_restore_mem_offset = ttmp12 label
130 var s_restore_alloc_size = ttmp3 label
131 var s_restore_tmp = ttmp2 label
132 var s_restore_mem_offset_save = s_restore_tmp label
133 var s_restore_m0 = s_restore_alloc_size label
134 var s_restore_mode = ttmp7 label
135 var s_restore_flat_scratch = s_restore_tmp label
136 var s_restore_pc_lo = ttmp0 label
137 var s_restore_pc_hi = ttmp1 label
138 var s_restore_exec_lo = ttmp4 label
139 var s_restore_exec_hi = ttmp5 label
140 var s_restore_state_priv = ttmp14 label
141 var s_restore_excp_flag_priv = ttmp15 label
142 var s_restore_xnack_mask = ttmp13 label
143 var s_restore_buf_rsrc0 = ttmp8 label
144 var s_restore_buf_rsrc1 = ttmp9 label
145 var s_restore_buf_rsrc2 = ttmp10 label
146 var s_restore_buf_rsrc3 = ttmp11 label
147 var s_restore_size = ttmp6 label
148 var s_restore_ttmps_lo = s_restore_tmp label
149 var s_restore_ttmps_hi = s_restore_alloc_size label
150 var s_restore_spi_init_hi_save = s_restore_exec_hi label