Lines Matching +full:2 +full:x
27 #define TAHITI_RB_BITMAP_WIDTH_PER_SH 2
75 #define DCCG_DISP1_SLOW_SELECT(x) ((x) << 0) argument
78 #define DCCG_DISP2_SLOW_SELECT(x) ((x) << 4) argument
86 #define SPLL_REF_DIV(x) ((x) << 4) argument
88 #define SPLL_PDIV_A(x) ((x) << 20) argument
92 #define SCLK_MUX_SEL(x) ((x) << 0) argument
97 #define SPLL_FB_DIV(x) ((x) << 0) argument
107 # define SPLL_REFCLK_SEL(x) ((x) << 26) argument
112 #define CLK_S(x) ((x) << 4) argument
116 #define CLK_V(x) ((x) << 0) argument
134 # define UPLL_PDIV_A(x) ((x) << 0) argument
136 # define UPLL_PDIV_B(x) ((x) << 8) argument
138 # define VCLK_SRC_SEL(x) ((x) << 20) argument
140 # define DCLK_SRC_SEL(x) ((x) << 25) argument
143 # define UPLL_FB_DIV(x) ((x) << 0) argument
153 # define MPLL_CLKOUT_SEL(x) ((x) << 8) argument
158 # define BCLK_AS_XCLK (1 << 2)
164 # define CMON_CLK_SEL(x) ((x) << 0) argument
166 # define TMON_CLK_SEL(x) ((x) << 8) argument
169 # define DEEP_SLEEP_CLK_SEL(x) ((x) << 0) argument
171 # define ZCLK_SEL(x) ((x) << 8) argument
175 #define DPM_EVENT_SRC(x) ((x) << 0) argument
177 #define DIG_THERM_DPM(x) ((x) << 14) argument
181 #define FDO_PWM_DUTY(x) ((x) << 9) argument
185 #define DIG_THERM_INTH(x) ((x) << 8) argument
188 #define DIG_THERM_INTL(x) ((x) << 16) argument
195 #define TEMP_SEL(x) ((x) << 20) argument
199 #define ASIC_MAX_TEMP(x) ((x) << 0) argument
202 #define CTF_TEMP(x) ((x) << 9) argument
207 #define FDO_STATIC_DUTY(x) ((x) << 0) argument
211 #define FMAX_DUTY100(x) ((x) << 0) argument
215 #define TMIN(x) ((x) << 0) argument
218 #define FDO_PWM_MODE(x) ((x) << 11) argument
221 #define TACH_PWM_RESP_RATE(x) ((x) << 25) argument
226 # define EDGE_PER_REV(x) ((x) << 0) argument
229 # define TARGET_PERIOD(x) ((x) << 3) argument
233 # define TACH_PERIOD(x) ((x) << 0) argument
240 # define THERMAL_PROTECTION_DIS (1 << 2)
242 # define SW_SMIO_INDEX(x) ((x) << 6) argument
270 # define UTC_0(x) ((x) << 0) argument
272 # define DTC_0(x) ((x) << 10) argument
276 # define BSP(x) ((x) << 0) argument
278 # define BSU(x) ((x) << 16) argument
281 # define CG_R(x) ((x) << 0) argument
283 # define CG_L(x) ((x) << 16) argument
287 # define CG_GICST(x) ((x) << 0) argument
289 # define CG_GIPOT(x) ((x) << 16) argument
293 # define SST(x) ((x) << 0) argument
295 # define SSTU(x) ((x) << 16) argument
299 # define DISP1_GAP(x) ((x) << 0) argument
301 # define DISP2_GAP(x) ((x) << 2) argument
302 # define DISP2_GAP_MASK (3 << 2)
303 # define VBI_TIMER_COUNT(x) ((x) << 4) argument
305 # define VBI_TIMER_UNIT(x) ((x) << 20) argument
307 # define DISP1_GAP_MCHG(x) ((x) << 24) argument
309 # define DISP2_GAP_MCHG(x) ((x) << 26) argument
318 # define CAC_WINDOW(x) ((x) << 0) argument
326 # define DMIF_BUFFERS_ALLOCATED(x) ((x) << 0) argument
369 #define L2_CACHE_PTE_ENDIAN_SWAP_MODE(x) ((x) << 2) argument
370 #define L2_CACHE_PDE_ENDIAN_SWAP_MODE(x) ((x) << 4) argument
373 #define EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 7) << 15) argument
374 #define CONTEXT1_IDENTITY_ACCESS_MODE(x) (((x) & 3) << 19) argument
378 #define INVALIDATE_CACHE_MODE(x) ((x) << 26) argument
381 #define INVALIDATE_ONLY_PDE_CACHES 2
383 #define BANK_SELECT(x) ((x) << 0) argument
384 #define L2_CACHE_UPDATE_MODE(x) ((x) << 6) argument
385 #define L2_CACHE_BIGK_FRAGMENT_SIZE(x) ((x) << 15) argument
391 #define PAGE_TABLE_DEPTH(x) (((x) & 3) << 1) argument
404 #define PAGE_TABLE_BLOCK_SIZE(x) (((x) & 0xF) << 24) argument
423 * bit 2: valid
476 #define SYSTEM_ACCESS_MODE_IN_SYS (2 << 3)
497 #define NOOFRANK_SHIFT 2
513 #define STATE0(x) ((x) << 0) argument
516 #define STATE1(x) ((x) << 5) argument
519 #define STATE2(x) ((x) << 10) argument
522 #define STATE3(x) ((x) << 15) argument
594 # define DLL_SPEED(x) ((x) << 0) argument
610 #define BWCTRL(x) ((x) << 20) argument
613 #define VCO_MODE(x) ((x) << 0) argument
615 #define CLKFRAC(x) ((x) << 4) argument
617 #define CLKF(x) ((x) << 16) argument
621 #define YCLK_POST_DIV(x) ((x) << 0) argument
624 #define YCLK_SEL(x) ((x) << 4) argument
628 #define CLKV(x) ((x) << 0) argument
631 #define CLKS(x) ((x) << 0) argument
652 # define IH_IB_SIZE(x) ((x) << 1) /* log2 */ argument
655 # define IH_WPTR_WRITEBACK_TIMER(x) ((x) << 9) /* log2 */ argument
667 # define IH_MC_SWAP(x) ((x) << 1) argument
670 # define IH_MC_SWAP_32BIT 2
673 # define MC_WRREQ_CREDIT(x) ((x) << 15) argument
674 # define MC_WR_CLEAN_CNT(x) ((x) << 20) argument
675 # define MC_VMID(x) ((x) << 25) argument
709 # define MAX_CHANNELS(x) (((x) & 0x7) << 0) argument
711 # define SUPPORTED_FREQUENCIES(x) (((x) & 0xff) << 8) argument
712 # define DESCRIPTOR_BYTE_2(x) (((x) & 0xff) << 16) argument
713 # define SUPPORTED_FREQUENCIES_STEREO(x) (((x) & 0xff) << 24) /* LPCM only */ argument
725 # define VIDEO_LIPSYNC(x) (((x) & 0xff) << 0) argument
726 # define AUDIO_LIPSYNC(x) (((x) & 0xff) << 8) argument
729 * x = legal delay value
736 # define MANUFACTURER_ID(x) (((x) & 0xffff) << 0) argument
737 # define PRODUCT_ID(x) (((x) & 0xffff) << 16) argument
739 # define SINK_DESCRIPTION_LEN(x) (((x) & 0xff) << 0) argument
741 # define PORT_ID0(x) (((x) & 0xffffffff) << 0) argument
743 # define PORT_ID1(x) (((x) & 0xffffffff) << 0) argument
745 # define DESCRIPTION0(x) (((x) & 0xff) << 0) argument
746 # define DESCRIPTION1(x) (((x) & 0xff) << 8) argument
747 # define DESCRIPTION2(x) (((x) & 0xff) << 16) argument
748 # define DESCRIPTION3(x) (((x) & 0xff) << 24) argument
750 # define DESCRIPTION4(x) (((x) & 0xff) << 0) argument
751 # define DESCRIPTION5(x) (((x) & 0xff) << 8) argument
752 # define DESCRIPTION6(x) (((x) & 0xff) << 16) argument
753 # define DESCRIPTION7(x) (((x) & 0xff) << 24) argument
755 # define DESCRIPTION8(x) (((x) & 0xff) << 0) argument
756 # define DESCRIPTION9(x) (((x) & 0xff) << 8) argument
757 # define DESCRIPTION10(x) (((x) & 0xff) << 16) argument
758 # define DESCRIPTION11(x) (((x) & 0xff) << 24) argument
760 # define DESCRIPTION12(x) (((x) & 0xff) << 0) argument
761 # define DESCRIPTION13(x) (((x) & 0xff) << 8) argument
762 # define DESCRIPTION14(x) (((x) & 0xff) << 16) argument
763 # define DESCRIPTION15(x) (((x) & 0xff) << 24) argument
765 # define DESCRIPTION16(x) (((x) & 0xff) << 0) argument
766 # define DESCRIPTION17(x) (((x) & 0xff) << 8) argument
776 #define DC_LB_MEMORY_CONFIG(x) ((x) << 20) argument
785 # define LATENCY_WATERMARK_MASK(x) ((x) << 16) argument
787 # define LATENCY_LOW_WATERMARK(x) ((x) << 0) argument
788 # define LATENCY_HIGH_WATERMARK(x) ((x) << 16) argument
811 # define LB_D1_VLINE_INTERRUPT (1 << 2)
820 # define LB_D2_VLINE_INTERRUPT (1 << 2)
826 # define LB_D3_VLINE_INTERRUPT (1 << 2)
831 # define LB_D4_VLINE_INTERRUPT (1 << 2)
836 # define LB_D5_VLINE_INTERRUPT (1 << 2)
841 # define LB_D6_VLINE_INTERRUPT (1 << 2)
885 # define DC_HPDx_CONNECTION_TIMER(x) ((x) << 0) argument
886 # define DC_HPDx_RX_INT_TIMER(x) ((x) << 16) argument
902 #define GRBM_READ_TIMEOUT(x) ((x) << 0) argument
938 #define SE_CB_CLEAN (1 << 2)
983 #define ROQ_IB1_START(x) ((x) << 0) argument
984 #define ROQ_IB2_START(x) ((x) << 8) argument
986 #define MEQ1_START(x) ((x) << 0) argument
987 #define MEQ2_START(x) ((x) << 8) argument
1012 #define NUM_CLIP_SEQ(x) ((x) << 1) argument
1019 #define FORCE_EOV_MAX_CLK_CNT(x) ((x) << 0) argument
1020 #define FORCE_EOV_MAX_REZ_CNT(x) ((x) << 16) argument
1023 #define SC_FRONTEND_PRIM_FIFO_SIZE(x) ((x) << 0) argument
1024 #define SC_BACKEND_PRIM_FIFO_SIZE(x) ((x) << 6) argument
1025 #define SC_HIZ_TILE_FIFO_SIZE(x) ((x) << 15) argument
1026 #define SC_EARLYZ_TILE_FIFO_SIZE(x) ((x) << 23) argument
1035 #define MIN_POWER(x) ((x) << 0) argument
1038 #define MAX_POWER(x) ((x) << 16) argument
1042 #define MAX_POWER_DELTA(x) ((x) << 0) argument
1045 #define STI_SIZE(x) ((x) << 16) argument
1048 #define LTI_RATIO(x) ((x) << 27) argument
1062 #define VTX_DONE_DELAY(x) ((x) << 0) argument
1078 #define BACKEND_DISABLE(x) ((x) << 16) argument
1080 #define NUM_PIPES(x) ((x) << 0) argument
1083 #define PIPE_INTERLEAVE_SIZE(x) ((x) << 4) argument
1086 #define NUM_SHADER_ENGINES(x) ((x) << 12) argument
1089 #define SHADER_ENGINE_TILE_SIZE(x) ((x) << 16) argument
1092 #define NUM_GPUS(x) ((x) << 20) argument
1095 #define MULTI_GPU_TILE_SIZE(x) ((x) << 24) argument
1098 #define ROW_SIZE(x) ((x) << 28) argument
1118 #define RB_BUFSZ(x) ((x) << 0) argument
1119 #define RB_BLKSZ(x) ((x) << 8) argument
1120 #define BUF_SWAP_32BIT (2 << 16)
1167 # define RB_XSEL2(x) ((x) << 4) argument
1171 # define PKR_MAP(x) ((x) << 8) argument
1172 # define PKR_XSEL(x) ((x) << 10) argument
1174 # define PKR_YSEL(x) ((x) << 12) argument
1176 # define SC_MAP(x) ((x) << 16) argument
1178 # define SC_XSEL(x) ((x) << 18) argument
1180 # define SC_YSEL(x) ((x) << 20) argument
1182 # define SE_MAP(x) ((x) << 24) argument
1183 # define SE_XSEL(x) ((x) << 26) argument
1185 # define SE_YSEL(x) ((x) << 28) argument
1190 # define LS2_EXIT_TIME(x) ((x) << 17) argument
1196 # define PLL_POWER_STATE_IN_TXS2_0(x) ((x) << 7) argument
1199 # define PLL_POWER_STATE_IN_OFF_0(x) ((x) << 10) argument
1202 # define PLL_RAMP_UP_TIME_0(x) ((x) << 24) argument
1206 # define PLL_POWER_STATE_IN_TXS2_1(x) ((x) << 7) argument
1209 # define PLL_POWER_STATE_IN_OFF_1(x) ((x) << 10) argument
1212 # define PLL_RAMP_UP_TIME_1(x) ((x) << 24) argument
1217 # define PLL_POWER_STATE_IN_TXS2_2(x) ((x) << 7) argument
1220 # define PLL_POWER_STATE_IN_OFF_2(x) ((x) << 10) argument
1223 # define PLL_RAMP_UP_TIME_2(x) ((x) << 24) argument
1227 # define PLL_POWER_STATE_IN_TXS2_3(x) ((x) << 7) argument
1230 # define PLL_POWER_STATE_IN_OFF_3(x) ((x) << 10) argument
1233 # define PLL_RAMP_UP_TIME_3(x) ((x) << 24) argument
1253 # define LC_OPERATING_LINK_WIDTH_MASK (0x7 << 2)
1254 # define LC_OPERATING_LINK_WIDTH_SHIFT 2
1263 # define LC_L0S_INACTIVITY(x) ((x) << 8) argument
1266 # define LC_L1_INACTIVITY(x) ((x) << 12) argument
1276 # define LC_LINK_WIDTH_X2 2
1289 # define LC_DYN_LANES_PWR_STATE(x) ((x) << 21) argument
1293 # define LC_XMIT_N_FTS(x) ((x) << 0) argument
1301 # define LC_TARGET_LINK_SPEED_OVERRIDE_EN (1 << 2)
1311 # define LC_CURRENT_DATA_RATE_MASK (0x3 << 13) /* 0/1/2 = gen1/2/3 */
1341 # define CG_DT(x) ((x) << 2) argument
1342 # define CG_DT_MASK (0xf << 2)
1343 # define CLK_OD(x) ((x) << 6) argument
1351 # define G_DIV_ID(x) ((x) << 2) argument
1352 # define G_DIV_ID_MASK (0x7 << 2)
1376 #define PACKET3_BASE_INDEX(x) ((x) << 0) argument
1377 #define GDS_PARTITION_BASE 2
1409 #define WRITE_DATA_DST_SEL(x) ((x) << 8) argument
1412 * 2 - tc/l2
1419 #define WRITE_DATA_ENGINE_SEL(x) ((x) << 30) argument
1422 * 2 - ce
1429 #define WAIT_REG_MEM_FUNCTION(x) ((x) << 0) argument
1432 * 2 - <=
1438 #define WAIT_REG_MEM_MEM_SPACE(x) ((x) << 4) argument
1442 #define WAIT_REG_MEM_ENGINE(x) ((x) << 8) argument
1450 * 2. SRC_ADDR_LO or DATA [31:0]
1457 # define PACKET3_CP_DMA_DST_SEL(x) ((x) << 20) argument
1461 # define PACKET3_CP_DMA_ENGINE(x) ((x) << 27) argument
1465 # define PACKET3_CP_DMA_SRC_SEL(x) ((x) << 29) argument
1468 * 2 - DATA
1473 # define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 22) argument
1476 * 2 - 8 in 32
1479 # define PACKET3_CP_DMA_CMD_DST_SWAP(x) ((x) << 24) argument
1482 * 2 - 8 in 32
1518 #define PACKET3_ME_INITIALIZE_DEVICE_ID(x) ((x) << 16) argument
1521 #define EVENT_TYPE(x) ((x) << 0) argument
1522 #define EVENT_INDEX(x) ((x) << 8) argument
1525 * 2 - SAMPLE_PIPELINESTAT
1535 #define DATA_SEL(x) ((x) << 29) argument
1538 * 2 - send 64bit data
1541 #define INT_SEL(x) ((x) << 24) argument
1544 * 2 - interrupt when data write is confirmed
1548 # define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28)
1589 # define DMA_RB_SIZE(x) ((x) << 1) /* log2 */ argument
1593 # define DMA_RPTR_WRITEBACK_TIMER(x) ((x) << 16) /* log2 */ argument
1609 # define SEM_WAIT_INT_ENABLE (1 << 2)
1636 #define DMA_PTE_PDE_PACKET(n) ((2 << 28) | \
1664 #define VCE_FME_SOFT_RESET (1 << 2)
1760 #define EVERGREEN_GRPH_SURFACE_UPDATE_PENDING (1 << 2)
1767 #define R600_D1GRPH_ARRAY_MODE_1D_TILED_THIN1 (2 << 20)
1779 #define R600_D1GRPH_SWAP_ENDIAN_32BIT (2 << 0)
1803 #define FMT_SPATIAL_DITHER_MODE(x) ((x) << 9) argument
1810 #define FMT_TEMPORAL_DITHER_OFFSET(x) ((x) << 21) argument
1813 #define FMT_25FRC_SEL(x) ((x) << 26) argument
1814 #define FMT_50FRC_SEL(x) ((x) << 28) argument
1815 #define FMT_75FRC_SEL(x) ((x) << 30) argument
1831 #define EVERGREEN_GRPH_DEPTH(x) (((x) & 0x3) << 0) argument
1834 #define EVERGREEN_GRPH_DEPTH_32BPP 2
1835 #define EVERGREEN_GRPH_NUM_BANKS(x) (((x) & 0x3) << 2) argument
1838 #define EVERGREEN_ADDR_SURF_8_BANK 2
1840 #define EVERGREEN_GRPH_Z(x) (((x) & 0x3) << 4) argument
1841 #define EVERGREEN_GRPH_BANK_WIDTH(x) (((x) & 0x3) << 6) argument
1844 #define EVERGREEN_ADDR_SURF_BANK_WIDTH_4 2
1846 #define EVERGREEN_GRPH_FORMAT(x) (((x) & 0x7) << 8) argument
1851 #define EVERGREEN_GRPH_FORMAT_ARGB4444 2
1859 #define EVERGREEN_GRPH_FORMAT_32BPP_DIG 2
1865 #define EVERGREEN_GRPH_BANK_HEIGHT(x) (((x) & 0x3) << 11) argument
1868 #define EVERGREEN_ADDR_SURF_BANK_HEIGHT_4 2
1870 #define EVERGREEN_GRPH_TILE_SPLIT(x) (((x) & 0x7) << 13) argument
1873 #define EVERGREEN_ADDR_SURF_TILE_SPLIT_256B 2
1878 #define EVERGREEN_GRPH_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 18) argument
1881 #define EVERGREEN_ADDR_SURF_MACRO_TILE_ASPECT_4 2
1883 #define EVERGREEN_GRPH_ARRAY_MODE(x) (((x) & 0x7) << 20) argument
1886 #define EVERGREEN_GRPH_ARRAY_1D_TILED_THIN1 2
1890 #define EVERGREEN_ADDR_SURF_MACRO_TILE_ASPECT_4 2
1894 #define EVERGREEN_GRPH_ENDIAN_SWAP(x) (((x) & 0x3) << 0) argument
1897 # define EVERGREEN_GRPH_ENDIAN_8IN32 2
1899 #define EVERGREEN_GRPH_RED_CROSSBAR(x) (((x) & 0x3) << 4) argument
1902 # define EVERGREEN_GRPH_RED_SEL_B 2
1904 #define EVERGREEN_GRPH_GREEN_CROSSBAR(x) (((x) & 0x3) << 6) argument
1907 # define EVERGREEN_GRPH_GREEN_SEL_A 2
1909 #define EVERGREEN_GRPH_BLUE_CROSSBAR(x) (((x) & 0x3) << 8) argument
1912 # define EVERGREEN_GRPH_BLUE_SEL_R 2
1914 #define EVERGREEN_GRPH_ALPHA_CROSSBAR(x) (((x) & 0x3) << 10) argument
1917 # define EVERGREEN_GRPH_ALPHA_SEL_G 2
1940 #define EVERGREEN_GRPH_SURFACE_UPDATE_PENDING (1 << 2)
1952 # define EVERGREEN_CURSOR_MODE(x) (((x) & 0x3) << 8) argument
1955 # define EVERGREEN_CURSOR_24_8_PRE_MULT 2
1959 # define EVERGREEN_CURSOR_URGENT_CONTROL(x) (((x) & 0x7) << 24) argument
1962 # define EVERGREEN_CURSOR_URGENT_1_4 2
1981 # define NI_INPUT_CSC_GRPH_MODE(x) (((x) & 0x3) << 0) argument
1984 # define NI_INPUT_CSC_PROG_SHARED_MATRIXA 2
1985 # define NI_INPUT_CSC_OVL_MODE(x) (((x) & 0x3) << 4) argument
1988 # define NI_OUTPUT_CSC_GRPH_MODE(x) (((x) & 0x7) << 0) argument
1991 # define NI_OUTPUT_CSC_YCBCR_601 2
1995 # define NI_OUTPUT_CSC_OVL_MODE(x) (((x) & 0x7) << 4) argument
1998 # define NI_GRPH_DEGAMMA_MODE(x) (((x) & 0x3) << 0) argument
2001 # define NI_DEGAMMA_XVYCC_222 2
2002 # define NI_OVL_DEGAMMA_MODE(x) (((x) & 0x3) << 4) argument
2003 # define NI_ICON_DEGAMMA_MODE(x) (((x) & 0x3) << 8) argument
2004 # define NI_CURSOR_DEGAMMA_MODE(x) (((x) & 0x3) << 12) argument
2007 # define NI_GRPH_GAMUT_REMAP_MODE(x) (((x) & 0x3) << 0) argument
2010 # define NI_GAMUT_REMAP_PROG_SHARED_MATRIXA 2
2012 # define NI_OVL_GAMUT_REMAP_MODE(x) (((x) & 0x3) << 4) argument
2015 # define NI_GRPH_REGAMMA_MODE(x) (((x) & 0x7) << 0) argument
2018 # define NI_REGAMMA_XVYCC_222 2
2021 # define NI_OVL_REGAMMA_MODE(x) (((x) & 0x7) << 4) argument
2031 # define NI_GRPH_INPUT_GAMMA_MODE(x) (((x) & 0x3) << 0) argument
2034 # define NI_INPUT_GAMMA_SRGB_24 2
2036 # define NI_OVL_INPUT_GAMMA_MODE(x) (((x) & 0x3) << 4) argument
2065 #define EVERGREEN_GRPH_SURFACE_UPDATE_PENDING (1 << 2)
2128 #define SDMA_MAX_INSTANCE 2
2153 #define VCEPLL_PDIV_A(x) ((x) << 0) argument
2155 #define VCEPLL_PDIV_B(x) ((x) << 8) argument
2157 #define EVCLK_SRC_SEL(x) ((x) << 20) argument
2159 #define ECCLK_SRC_SEL(x) ((x) << 25) argument
2163 #define VCEPLL_FB_DIV(x) ((x) << 0) argument