Lines Matching defs:amdgpu_ring
244 struct amdgpu_ring { struct
246 const struct amdgpu_ring_funcs *funcs; argument
247 struct amdgpu_fence_driver fence_drv;
248 struct drm_gpu_scheduler sched;
250 struct amdgpu_bo *ring_obj;
251 uint32_t *ring;
252 unsigned rptr_offs;
253 u64 rptr_gpu_addr;
254 volatile u32 *rptr_cpu_addr;
255 u64 wptr;
256 u64 wptr_old;
257 unsigned ring_size;
258 unsigned max_dw;
259 int count_dw;
260 uint64_t gpu_addr;
261 uint64_t ptr_mask;
262 uint32_t buf_mask;
263 u32 idx;
264 u32 xcc_id;
265 u32 xcp_id;
266 u32 me;
267 u32 pipe;
268 u32 queue;
269 struct amdgpu_bo *mqd_obj;
270 uint64_t mqd_gpu_addr;
271 void *mqd_ptr;
272 unsigned mqd_size;
273 uint64_t eop_gpu_addr;
274 u32 doorbell_index;
275 bool use_doorbell;
276 bool use_pollmem;
277 unsigned wptr_offs;
278 u64 wptr_gpu_addr;
279 volatile u32 *wptr_cpu_addr;
280 unsigned fence_offs;
281 u64 fence_gpu_addr;
282 volatile u32 *fence_cpu_addr;
283 uint64_t current_ctx;
284 char name[16];
285 u32 trail_seq;
286 unsigned trail_fence_offs;
287 u64 trail_fence_gpu_addr;
288 volatile u32 *trail_fence_cpu_addr;
289 unsigned cond_exe_offs;
290 u64 cond_exe_gpu_addr;
291 volatile u32 *cond_exe_cpu_addr;
292 unsigned int set_q_mode_offs;
316 #define amdgpu_ring_parse_cs(r, p, job, ib) ((r)->funcs->parse_cs((p), (job), (ib))) argument