Lines Matching full:ring
40 * Most engines on the GPU are fed via ring buffers. Ring
46 * pointers are equal, the ring is idle. When the host
47 * writes commands to the ring buffer, it increments the
55 * @type: ring type for which to return the limit.
73 * amdgpu_ring_alloc - allocate space on the ring buffer
75 * @ring: amdgpu_ring structure holding ring information
76 * @ndw: number of dwords to allocate in the ring buffer
78 * Allocate @ndw dwords in the ring buffer (all asics).
81 int amdgpu_ring_alloc(struct amdgpu_ring *ring, unsigned int ndw) in amdgpu_ring_alloc() argument
85 ndw = (ndw + ring->funcs->align_mask) & ~ring->funcs->align_mask; in amdgpu_ring_alloc()
90 if (WARN_ON_ONCE(ndw > ring->max_dw)) in amdgpu_ring_alloc()
93 ring->count_dw = ndw; in amdgpu_ring_alloc()
94 ring->wptr_old = ring->wptr; in amdgpu_ring_alloc()
96 if (ring->funcs->begin_use) in amdgpu_ring_alloc()
97 ring->funcs->begin_use(ring); in amdgpu_ring_alloc()
104 * @ring: amdgpu_ring structure holding ring information
109 void amdgpu_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count) in amdgpu_ring_insert_nop() argument
113 occupied = ring->wptr & ring->buf_mask; in amdgpu_ring_insert_nop()
114 chunk1 = ring->buf_mask + 1 - occupied; in amdgpu_ring_insert_nop()
119 memset32(&ring->ring[occupied], ring->funcs->nop, chunk1); in amdgpu_ring_insert_nop()
122 memset32(ring->ring, ring->funcs->nop, chunk2); in amdgpu_ring_insert_nop()
124 ring->wptr += count; in amdgpu_ring_insert_nop()
125 ring->wptr &= ring->ptr_mask; in amdgpu_ring_insert_nop()
126 ring->count_dw -= count; in amdgpu_ring_insert_nop()
132 * @ring: amdgpu_ring structure holding ring information
137 void amdgpu_ring_generic_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib) in amdgpu_ring_generic_pad_ib() argument
139 while (ib->length_dw & ring->funcs->align_mask) in amdgpu_ring_generic_pad_ib()
140 ib->ptr[ib->length_dw++] = ring->funcs->nop; in amdgpu_ring_generic_pad_ib()
145 * commands on the ring buffer
147 * @ring: amdgpu_ring structure holding ring information
150 * execute new commands on the ring buffer (all asics).
152 void amdgpu_ring_commit(struct amdgpu_ring *ring) in amdgpu_ring_commit() argument
156 if (ring->count_dw < 0) in amdgpu_ring_commit()
157 DRM_ERROR("amdgpu: writing more dwords to the ring than expected!\n"); in amdgpu_ring_commit()
160 count = ring->funcs->align_mask + 1 - in amdgpu_ring_commit()
161 (ring->wptr & ring->funcs->align_mask); in amdgpu_ring_commit()
162 count &= ring->funcs->align_mask; in amdgpu_ring_commit()
165 ring->funcs->insert_nop(ring, count); in amdgpu_ring_commit()
168 amdgpu_ring_set_wptr(ring); in amdgpu_ring_commit()
170 if (ring->funcs->end_use) in amdgpu_ring_commit()
171 ring->funcs->end_use(ring); in amdgpu_ring_commit()
177 * @ring: amdgpu_ring structure holding ring information
181 void amdgpu_ring_undo(struct amdgpu_ring *ring) in amdgpu_ring_undo() argument
183 ring->wptr = ring->wptr_old; in amdgpu_ring_undo()
185 if (ring->funcs->end_use) in amdgpu_ring_undo()
186 ring->funcs->end_use(ring); in amdgpu_ring_undo()
189 #define amdgpu_ring_get_gpu_addr(ring, offset) \ argument
190 (ring->is_mes_queue ? \
191 (ring->mes_ctx->meta_data_gpu_addr + offset) : \
192 (ring->adev->wb.gpu_addr + offset * 4))
194 #define amdgpu_ring_get_cpu_addr(ring, offset) \ argument
195 (ring->is_mes_queue ? \
196 (void *)((uint8_t *)(ring->mes_ctx->meta_data_ptr) + offset) : \
197 (&ring->adev->wb.wb[offset]))
200 * amdgpu_ring_init - init driver ring struct.
203 * @ring: amdgpu_ring structure holding ring information
204 * @max_dw: maximum number of dw for ring alloc
205 * @irq_src: interrupt source to use for this ring
206 * @irq_type: interrupt type to use for this ring
207 * @hw_prio: ring priority (NORMAL/HIGH)
210 * Initialize the driver information for the selected ring (all asics).
213 int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring, in amdgpu_ring_init() argument
228 * KIQ tasks get submitted directly to the ring. in amdgpu_ring_init()
230 if (ring->funcs->type == AMDGPU_RING_TYPE_KIQ) in amdgpu_ring_init()
232 if (ring->funcs->type == AMDGPU_RING_TYPE_MES) in amdgpu_ring_init()
234 else if (ring == &adev->sdma.instance[0].page) in amdgpu_ring_init()
237 if (ring->adev == NULL) { in amdgpu_ring_init()
241 ring->adev = adev; in amdgpu_ring_init()
242 ring->num_hw_submission = sched_hw_submission; in amdgpu_ring_init()
243 ring->sched_score = sched_score; in amdgpu_ring_init()
244 ring->vmid_wait = dma_fence_get_stub(); in amdgpu_ring_init()
246 if (!ring->is_mes_queue) { in amdgpu_ring_init()
247 ring->idx = adev->num_rings++; in amdgpu_ring_init()
248 adev->rings[ring->idx] = ring; in amdgpu_ring_init()
251 r = amdgpu_fence_driver_init_ring(ring); in amdgpu_ring_init()
256 if (ring->is_mes_queue) { in amdgpu_ring_init()
257 ring->rptr_offs = amdgpu_mes_ctx_get_offs(ring, in amdgpu_ring_init()
259 ring->wptr_offs = amdgpu_mes_ctx_get_offs(ring, in amdgpu_ring_init()
261 ring->fence_offs = amdgpu_mes_ctx_get_offs(ring, in amdgpu_ring_init()
263 ring->trail_fence_offs = amdgpu_mes_ctx_get_offs(ring, in amdgpu_ring_init()
265 ring->cond_exe_offs = amdgpu_mes_ctx_get_offs(ring, in amdgpu_ring_init()
268 r = amdgpu_device_wb_get(adev, &ring->rptr_offs); in amdgpu_ring_init()
270 dev_err(adev->dev, "(%d) ring rptr_offs wb alloc failed\n", r); in amdgpu_ring_init()
274 r = amdgpu_device_wb_get(adev, &ring->wptr_offs); in amdgpu_ring_init()
276 dev_err(adev->dev, "(%d) ring wptr_offs wb alloc failed\n", r); in amdgpu_ring_init()
280 r = amdgpu_device_wb_get(adev, &ring->fence_offs); in amdgpu_ring_init()
282 dev_err(adev->dev, "(%d) ring fence_offs wb alloc failed\n", r); in amdgpu_ring_init()
286 r = amdgpu_device_wb_get(adev, &ring->trail_fence_offs); in amdgpu_ring_init()
288 dev_err(adev->dev, "(%d) ring trail_fence_offs wb alloc failed\n", r); in amdgpu_ring_init()
292 r = amdgpu_device_wb_get(adev, &ring->cond_exe_offs); in amdgpu_ring_init()
294 dev_err(adev->dev, "(%d) ring cond_exec_polling wb alloc failed\n", r); in amdgpu_ring_init()
299 ring->fence_gpu_addr = in amdgpu_ring_init()
300 amdgpu_ring_get_gpu_addr(ring, ring->fence_offs); in amdgpu_ring_init()
301 ring->fence_cpu_addr = in amdgpu_ring_init()
302 amdgpu_ring_get_cpu_addr(ring, ring->fence_offs); in amdgpu_ring_init()
304 ring->rptr_gpu_addr = in amdgpu_ring_init()
305 amdgpu_ring_get_gpu_addr(ring, ring->rptr_offs); in amdgpu_ring_init()
306 ring->rptr_cpu_addr = in amdgpu_ring_init()
307 amdgpu_ring_get_cpu_addr(ring, ring->rptr_offs); in amdgpu_ring_init()
309 ring->wptr_gpu_addr = in amdgpu_ring_init()
310 amdgpu_ring_get_gpu_addr(ring, ring->wptr_offs); in amdgpu_ring_init()
311 ring->wptr_cpu_addr = in amdgpu_ring_init()
312 amdgpu_ring_get_cpu_addr(ring, ring->wptr_offs); in amdgpu_ring_init()
314 ring->trail_fence_gpu_addr = in amdgpu_ring_init()
315 amdgpu_ring_get_gpu_addr(ring, ring->trail_fence_offs); in amdgpu_ring_init()
316 ring->trail_fence_cpu_addr = in amdgpu_ring_init()
317 amdgpu_ring_get_cpu_addr(ring, ring->trail_fence_offs); in amdgpu_ring_init()
319 ring->cond_exe_gpu_addr = in amdgpu_ring_init()
320 amdgpu_ring_get_gpu_addr(ring, ring->cond_exe_offs); in amdgpu_ring_init()
321 ring->cond_exe_cpu_addr = in amdgpu_ring_init()
322 amdgpu_ring_get_cpu_addr(ring, ring->cond_exe_offs); in amdgpu_ring_init()
325 *ring->cond_exe_cpu_addr = 1; in amdgpu_ring_init()
327 if (ring->funcs->type != AMDGPU_RING_TYPE_CPER) { in amdgpu_ring_init()
328 r = amdgpu_fence_driver_start_ring(ring, irq_src, irq_type); in amdgpu_ring_init()
334 max_ibs_dw = ring->funcs->emit_frame_size + in amdgpu_ring_init()
335 amdgpu_ring_max_ibs(ring->funcs->type) * ring->funcs->emit_ib_size; in amdgpu_ring_init()
336 max_ibs_dw = (max_ibs_dw + ring->funcs->align_mask) & ~ring->funcs->align_mask; in amdgpu_ring_init()
341 ring->ring_size = roundup_pow_of_two(max_dw * 4 * sched_hw_submission); in amdgpu_ring_init()
343 ring->ring_size = roundup_pow_of_two(max_dw * 4); in amdgpu_ring_init()
344 ring->count_dw = (ring->ring_size - 4) >> 2; in amdgpu_ring_init()
345 /* ring buffer is empty now */ in amdgpu_ring_init()
346 ring->wptr = *ring->rptr_cpu_addr = 0; in amdgpu_ring_init()
349 ring->buf_mask = (ring->ring_size / 4) - 1; in amdgpu_ring_init()
350 ring->ptr_mask = ring->funcs->support_64bit_ptrs ? in amdgpu_ring_init()
351 0xffffffffffffffff : ring->buf_mask; in amdgpu_ring_init()
353 ring->cached_rptr = 0; in amdgpu_ring_init()
355 /* Allocate ring buffer */ in amdgpu_ring_init()
356 if (ring->is_mes_queue) { in amdgpu_ring_init()
359 BUG_ON(ring->ring_size > PAGE_SIZE*4); in amdgpu_ring_init()
361 offset = amdgpu_mes_ctx_get_offs(ring, in amdgpu_ring_init()
363 ring->gpu_addr = amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset); in amdgpu_ring_init()
364 ring->ring = amdgpu_mes_ctx_get_offs_cpu_addr(ring, offset); in amdgpu_ring_init()
365 amdgpu_ring_clear_ring(ring); in amdgpu_ring_init()
367 } else if (ring->ring_obj == NULL) { in amdgpu_ring_init()
368 r = amdgpu_bo_create_kernel(adev, ring->ring_size + ring->funcs->extra_dw, PAGE_SIZE, in amdgpu_ring_init()
370 &ring->ring_obj, in amdgpu_ring_init()
371 &ring->gpu_addr, in amdgpu_ring_init()
372 (void **)&ring->ring); in amdgpu_ring_init()
374 dev_err(adev->dev, "(%d) ring create failed\n", r); in amdgpu_ring_init()
377 amdgpu_ring_clear_ring(ring); in amdgpu_ring_init()
380 ring->max_dw = max_dw; in amdgpu_ring_init()
381 ring->hw_prio = hw_prio; in amdgpu_ring_init()
383 if (!ring->no_scheduler && ring->funcs->type < AMDGPU_HW_IP_NUM) { in amdgpu_ring_init()
384 hw_ip = ring->funcs->type; in amdgpu_ring_init()
387 &ring->sched; in amdgpu_ring_init()
394 * amdgpu_ring_fini - tear down the driver ring struct.
396 * @ring: amdgpu_ring structure holding ring information
398 * Tear down the driver information for the selected ring (all asics).
400 void amdgpu_ring_fini(struct amdgpu_ring *ring) in amdgpu_ring_fini() argument
403 /* Not to finish a ring which is not initialized */ in amdgpu_ring_fini()
404 if (!(ring->adev) || in amdgpu_ring_fini()
405 (!ring->is_mes_queue && !(ring->adev->rings[ring->idx]))) in amdgpu_ring_fini()
408 ring->sched.ready = false; in amdgpu_ring_fini()
410 if (!ring->is_mes_queue) { in amdgpu_ring_fini()
411 amdgpu_device_wb_free(ring->adev, ring->rptr_offs); in amdgpu_ring_fini()
412 amdgpu_device_wb_free(ring->adev, ring->wptr_offs); in amdgpu_ring_fini()
414 amdgpu_device_wb_free(ring->adev, ring->cond_exe_offs); in amdgpu_ring_fini()
415 amdgpu_device_wb_free(ring->adev, ring->fence_offs); in amdgpu_ring_fini()
417 amdgpu_bo_free_kernel(&ring->ring_obj, in amdgpu_ring_fini()
418 &ring->gpu_addr, in amdgpu_ring_fini()
419 (void **)&ring->ring); in amdgpu_ring_fini()
421 kfree(ring->fence_drv.fences); in amdgpu_ring_fini()
424 dma_fence_put(ring->vmid_wait); in amdgpu_ring_fini()
425 ring->vmid_wait = NULL; in amdgpu_ring_fini()
426 ring->me = 0; in amdgpu_ring_fini()
428 if (!ring->is_mes_queue) in amdgpu_ring_fini()
429 ring->adev->rings[ring->idx] = NULL; in amdgpu_ring_fini()
433 * amdgpu_ring_emit_reg_write_reg_wait_helper - ring helper
435 * @ring: ring to write to
444 void amdgpu_ring_emit_reg_write_reg_wait_helper(struct amdgpu_ring *ring, in amdgpu_ring_emit_reg_write_reg_wait_helper() argument
448 amdgpu_ring_emit_wreg(ring, reg0, ref); in amdgpu_ring_emit_reg_write_reg_wait_helper()
449 amdgpu_ring_emit_reg_wait(ring, reg1, mask, mask); in amdgpu_ring_emit_reg_write_reg_wait_helper()
453 * amdgpu_ring_soft_recovery - try to soft recover a ring lockup
455 * @ring: ring to try the recovery on
459 * Tries to get a ring proceeding again when it is stuck.
461 bool amdgpu_ring_soft_recovery(struct amdgpu_ring *ring, unsigned int vmid, in amdgpu_ring_soft_recovery() argument
467 if (unlikely(ring->adev->debug_disable_soft_recovery)) in amdgpu_ring_soft_recovery()
472 if (amdgpu_sriov_vf(ring->adev) || !ring->funcs->soft_recovery || !fence) in amdgpu_ring_soft_recovery()
480 atomic_inc(&ring->adev->gpu_reset_counter); in amdgpu_ring_soft_recovery()
483 ring->funcs->soft_recovery(ring, vmid); in amdgpu_ring_soft_recovery()
498 * followed by n-words of ring data
503 struct amdgpu_ring *ring = file_inode(f)->i_private; in amdgpu_debugfs_ring_read() local
515 if (ring->funcs->type == AMDGPU_RING_TYPE_CPER) in amdgpu_debugfs_ring_read()
516 mutex_lock(&ring->adev->cper.ring_lock); in amdgpu_debugfs_ring_read()
518 early[0] = amdgpu_ring_get_rptr(ring) & ring->buf_mask; in amdgpu_debugfs_ring_read()
519 early[1] = amdgpu_ring_get_wptr(ring) & ring->buf_mask; in amdgpu_debugfs_ring_read()
520 early[2] = ring->wptr & ring->buf_mask; in amdgpu_debugfs_ring_read()
534 if (ring->funcs->type != AMDGPU_RING_TYPE_CPER) { in amdgpu_debugfs_ring_read()
536 if (*pos >= (ring->ring_size + 12)) in amdgpu_debugfs_ring_read()
539 value = ring->ring[(*pos - 12)/4]; in amdgpu_debugfs_ring_read()
553 size = ring->ring_size - (early[0] - early[1]); in amdgpu_debugfs_ring_read()
559 value = ring->ring[p]; in amdgpu_debugfs_ring_read()
570 p &= ring->ptr_mask; in amdgpu_debugfs_ring_read()
575 if (ring->funcs->type == AMDGPU_RING_TYPE_CPER) in amdgpu_debugfs_ring_read()
576 mutex_unlock(&ring->adev->cper.ring_lock); in amdgpu_debugfs_ring_read()
584 struct amdgpu_ring *ring = file_inode(f)->i_private; in amdgpu_debugfs_virt_ring_read() local
589 if (ring->funcs->type == AMDGPU_RING_TYPE_CPER) in amdgpu_debugfs_virt_ring_read()
590 amdgpu_virt_req_ras_cper_dump(ring->adev, false); in amdgpu_debugfs_virt_ring_read()
610 struct amdgpu_ring *ring = file_inode(f)->i_private; in amdgpu_debugfs_mqd_read() local
611 ssize_t bytes = min_t(ssize_t, ring->mqd_size - *pos, size); in amdgpu_debugfs_mqd_read()
612 void *from = ((u8 *)ring->mqd_ptr) + *pos; in amdgpu_debugfs_mqd_read()
614 if (*pos > ring->mqd_size) in amdgpu_debugfs_mqd_read()
632 struct amdgpu_ring *ring = data; in amdgpu_debugfs_ring_error() local
634 amdgpu_fence_driver_set_error(ring, val); in amdgpu_debugfs_ring_error()
644 struct amdgpu_ring *ring) in amdgpu_debugfs_ring_init() argument
651 sprintf(name, "amdgpu_ring_%s", ring->name); in amdgpu_debugfs_ring_init()
653 debugfs_create_file_size(name, S_IFREG | 0444, root, ring, in amdgpu_debugfs_ring_init()
655 ring->ring_size + 12); in amdgpu_debugfs_ring_init()
657 debugfs_create_file_size(name, S_IFREG | 0444, root, ring, in amdgpu_debugfs_ring_init()
659 ring->ring_size + 12); in amdgpu_debugfs_ring_init()
661 if (ring->mqd_obj) { in amdgpu_debugfs_ring_init()
662 sprintf(name, "amdgpu_mqd_%s", ring->name); in amdgpu_debugfs_ring_init()
663 debugfs_create_file_size(name, S_IFREG | 0444, root, ring, in amdgpu_debugfs_ring_init()
665 ring->mqd_size); in amdgpu_debugfs_ring_init()
668 sprintf(name, "amdgpu_error_%s", ring->name); in amdgpu_debugfs_ring_init()
669 debugfs_create_file(name, 0200, root, ring, in amdgpu_debugfs_ring_init()
676 * amdgpu_ring_test_helper - tests ring and set sched readiness status
678 * @ring: ring to try the recovery on
680 * Tests ring and set sched readiness status
684 int amdgpu_ring_test_helper(struct amdgpu_ring *ring) in amdgpu_ring_test_helper() argument
686 struct amdgpu_device *adev = ring->adev; in amdgpu_ring_test_helper()
689 r = amdgpu_ring_test_ring(ring); in amdgpu_ring_test_helper()
691 DRM_DEV_ERROR(adev->dev, "ring %s test failed (%d)\n", in amdgpu_ring_test_helper()
692 ring->name, r); in amdgpu_ring_test_helper()
694 DRM_DEV_DEBUG(adev->dev, "ring test on %s succeeded\n", in amdgpu_ring_test_helper()
695 ring->name); in amdgpu_ring_test_helper()
697 ring->sched.ready = !r; in amdgpu_ring_test_helper()
702 static void amdgpu_ring_to_mqd_prop(struct amdgpu_ring *ring, in amdgpu_ring_to_mqd_prop() argument
705 struct amdgpu_device *adev = ring->adev; in amdgpu_ring_to_mqd_prop()
706 bool is_high_prio_compute = ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE && in amdgpu_ring_to_mqd_prop()
707 amdgpu_gfx_is_high_priority_compute_queue(adev, ring); in amdgpu_ring_to_mqd_prop()
708 bool is_high_prio_gfx = ring->funcs->type == AMDGPU_RING_TYPE_GFX && in amdgpu_ring_to_mqd_prop()
709 amdgpu_gfx_is_high_priority_graphics_queue(adev, ring); in amdgpu_ring_to_mqd_prop()
713 prop->mqd_gpu_addr = ring->mqd_gpu_addr; in amdgpu_ring_to_mqd_prop()
714 prop->hqd_base_gpu_addr = ring->gpu_addr; in amdgpu_ring_to_mqd_prop()
715 prop->rptr_gpu_addr = ring->rptr_gpu_addr; in amdgpu_ring_to_mqd_prop()
716 prop->wptr_gpu_addr = ring->wptr_gpu_addr; in amdgpu_ring_to_mqd_prop()
717 prop->queue_size = ring->ring_size; in amdgpu_ring_to_mqd_prop()
718 prop->eop_gpu_addr = ring->eop_gpu_addr; in amdgpu_ring_to_mqd_prop()
719 prop->use_doorbell = ring->use_doorbell; in amdgpu_ring_to_mqd_prop()
720 prop->doorbell_index = ring->doorbell_index; in amdgpu_ring_to_mqd_prop()
725 prop->hqd_active = ring->funcs->type == AMDGPU_RING_TYPE_KIQ; in amdgpu_ring_to_mqd_prop()
734 int amdgpu_ring_init_mqd(struct amdgpu_ring *ring) in amdgpu_ring_init_mqd() argument
736 struct amdgpu_device *adev = ring->adev; in amdgpu_ring_init_mqd()
740 amdgpu_ring_to_mqd_prop(ring, &prop); in amdgpu_ring_init_mqd()
742 ring->wptr = 0; in amdgpu_ring_init_mqd()
744 if (ring->funcs->type == AMDGPU_RING_TYPE_KIQ) in amdgpu_ring_init_mqd()
747 mqd_mgr = &adev->mqds[ring->funcs->type]; in amdgpu_ring_init_mqd()
749 return mqd_mgr->init_mqd(adev, ring->mqd_ptr, &prop); in amdgpu_ring_init_mqd()
752 void amdgpu_ring_ib_begin(struct amdgpu_ring *ring) in amdgpu_ring_ib_begin() argument
754 if (ring->is_sw_ring) in amdgpu_ring_ib_begin()
755 amdgpu_sw_ring_ib_begin(ring); in amdgpu_ring_ib_begin()
758 void amdgpu_ring_ib_end(struct amdgpu_ring *ring) in amdgpu_ring_ib_end() argument
760 if (ring->is_sw_ring) in amdgpu_ring_ib_end()
761 amdgpu_sw_ring_ib_end(ring); in amdgpu_ring_ib_end()
764 void amdgpu_ring_ib_on_emit_cntl(struct amdgpu_ring *ring) in amdgpu_ring_ib_on_emit_cntl() argument
766 if (ring->is_sw_ring) in amdgpu_ring_ib_on_emit_cntl()
767 amdgpu_sw_ring_ib_mark_offset(ring, AMDGPU_MUX_OFFSET_TYPE_CONTROL); in amdgpu_ring_ib_on_emit_cntl()
770 void amdgpu_ring_ib_on_emit_ce(struct amdgpu_ring *ring) in amdgpu_ring_ib_on_emit_ce() argument
772 if (ring->is_sw_ring) in amdgpu_ring_ib_on_emit_ce()
773 amdgpu_sw_ring_ib_mark_offset(ring, AMDGPU_MUX_OFFSET_TYPE_CE); in amdgpu_ring_ib_on_emit_ce()
776 void amdgpu_ring_ib_on_emit_de(struct amdgpu_ring *ring) in amdgpu_ring_ib_on_emit_de() argument
778 if (ring->is_sw_ring) in amdgpu_ring_ib_on_emit_de()
779 amdgpu_sw_ring_ib_mark_offset(ring, AMDGPU_MUX_OFFSET_TYPE_DE); in amdgpu_ring_ib_on_emit_de()
782 bool amdgpu_ring_sched_ready(struct amdgpu_ring *ring) in amdgpu_ring_sched_ready() argument
784 if (!ring) in amdgpu_ring_sched_ready()
787 if (ring->no_scheduler || !drm_sched_wqueue_ready(&ring->sched)) in amdgpu_ring_sched_ready()