Lines Matching defs:amdgpu_gmc
206 struct amdgpu_gmc { struct
212 resource_size_t aper_size;
213 resource_size_t aper_base;
216 u64 mc_vram_size;
217 u64 visible_vram_size;
228 u64 agp_size;
229 u64 agp_start;
230 u64 agp_end;
239 u64 gart_size;
240 u64 gart_start;
241 u64 gart_end;
252 u64 vram_start;
253 u64 vram_end;
260 u64 fb_start;
261 u64 fb_end;
285 struct amdgpu_gmc_fault fault_ring[AMDGPU_GMC_FAULT_RING_SIZE]; argument
296 const struct amdgpu_gmc_funcs *gmc_funcs; argument
297 enum amdgpu_memory_partition requested_nps_mode;
298 uint32_t supported_nps_modes;
299 uint32_t reset_flags;
301 struct amdgpu_xgmi xgmi;
302 struct amdgpu_irq_src ecc_irq;
303 int noretry;
305 uint32_t vmid0_page_table_block_size;
306 uint32_t vmid0_page_table_depth;
307 struct amdgpu_bo *pdb0_bo;
309 void *ptr_pdb0;
312 u64 mall_size;
313 uint32_t m_half_use;
316 int num_umc;
318 u64 VM_L2_CNTL;
319 u64 VM_L2_CNTL2;
320 u64 VM_DUMMY_PAGE_FAULT_CNTL;
321 u64 VM_DUMMY_PAGE_FAULT_ADDR_LO32;
322 u64 VM_DUMMY_PAGE_FAULT_ADDR_HI32;
323 u64 VM_L2_PROTECTION_FAULT_CNTL;
324 u64 VM_L2_PROTECTION_FAULT_CNTL2;
325 u64 VM_L2_PROTECTION_FAULT_MM_CNTL3;
326 u64 VM_L2_PROTECTION_FAULT_MM_CNTL4;
327 u64 VM_L2_PROTECTION_FAULT_ADDR_LO32;
351 #define amdgpu_gmc_emit_flush_gpu_tlb(r, vmid, addr) (r)->adev->gmc.gmc_funcs->emit_flush_gpu_tlb((… argument