Lines Matching defs:amdgpu_gfx_config
190 struct amdgpu_gfx_config { struct
191 unsigned max_shader_engines;
192 unsigned max_tile_pipes;
193 unsigned max_cu_per_sh;
194 unsigned max_sh_per_se;
195 unsigned max_backends_per_se;
196 unsigned max_texture_channel_caches;
197 unsigned max_gprs;
198 unsigned max_gs_threads;
199 unsigned max_hw_contexts;
200 unsigned sc_prim_fifo_size_frontend;
201 unsigned sc_prim_fifo_size_backend;
202 unsigned sc_hiz_tile_fifo_size;
203 unsigned sc_earlyz_tile_fifo_size;
205 unsigned num_tile_pipes;
206 unsigned backend_enable_mask;
207 unsigned mem_max_burst_length_bytes;
208 unsigned mem_row_size_in_kb;
209 unsigned shader_engine_tile_size;
210 unsigned num_gpus;
211 unsigned multi_gpu_tile_size;
212 unsigned mc_arb_ramcfg;
213 unsigned num_banks;
214 unsigned num_ranks;
215 unsigned gb_addr_config;
216 unsigned num_rbs;
217 unsigned gs_vgt_table_depth;
218 unsigned gs_prim_buffer_depth;
220 uint32_t tile_mode_array[32];
221 uint32_t macrotile_mode_array[16];
223 struct gb_addr_config gb_addr_config_fields;
224 struct amdgpu_rb_config rb_config[AMDGPU_GFX_MAX_SE][AMDGPU_GFX_MAX_SH_PER_SE];
227 uint32_t double_offchip_lds_buf;
229 uint32_t db_debug2;
231 uint32_t num_sc_per_sh;
232 uint32_t num_packer_per_sc;
233 uint32_t pa_sc_tile_steering_override;
235 bool ta_cntl2_truncate_coord_mode;
236 uint64_t tcc_disabled_mask;
237 uint32_t gc_num_tcp_per_sa;
238 uint32_t gc_num_sdp_interface;
239 uint32_t gc_num_tcps;
240 uint32_t gc_num_tcp_per_wpg;
241 uint32_t gc_tcp_l1_size;
242 uint32_t gc_num_sqc_per_wgp;
243 uint32_t gc_l1_instruction_cache_size_per_sqc;
244 uint32_t gc_l1_data_cache_size_per_sqc;
245 uint32_t gc_gl1c_per_sa;
246 uint32_t gc_gl1c_size_per_instance;
247 uint32_t gc_gl2c_per_gpu;
248 uint32_t gc_tcp_size_per_cu;
249 uint32_t gc_num_cu_per_sqc;
250 uint32_t gc_tcc_size;
251 uint32_t gc_tcp_cache_line_size;
252 uint32_t gc_instruction_cache_size_per_sqc;
253 uint32_t gc_instruction_cache_line_size;
254 uint32_t gc_scalar_data_cache_size_per_sqc;
255 uint32_t gc_scalar_data_cache_line_size;
256 uint32_t gc_tcc_cache_line_size;