Lines Matching defs:amdgpu_device

861 struct amdgpu_device {  struct
862 struct device *dev;
863 struct pci_dev *pdev;
864 struct drm_device ddev;
867 struct amdgpu_acp acp;
869 struct amdgpu_hive_info *hive;
870 struct amdgpu_xcp_mgr *xcp_mgr;
872 enum amd_asic_type asic_type;
873 uint32_t family;
874 uint32_t rev_id;
875 uint32_t external_rev_id;
876 unsigned long flags;
877 unsigned long apu_flags;
878 int usec_timeout;
879 const struct amdgpu_asic_funcs *asic_funcs;
880 bool shutdown;
881 bool need_swiotlb;
882 bool accel_working;
883 struct notifier_block acpi_nb;
884 struct notifier_block pm_nb;
885 struct amdgpu_i2c_chan *i2c_bus[AMDGPU_MAX_I2C_BUS];
886 struct debugfs_blob_wrapper debugfs_vbios_blob;
887 struct debugfs_blob_wrapper debugfs_discovery_blob;
888 struct mutex srbm_mutex;
890 struct mutex grbm_idx_mutex;
891 struct dev_pm_domain vga_pm_domain;
892 bool have_disp_power_ref;
893 bool have_atomics_support;
896 bool is_atom_fw;
897 uint8_t *bios;
898 uint32_t bios_size;
899 uint32_t bios_scratch_reg_offset;
900 uint32_t bios_scratch[AMDGPU_BIOS_NUM_SCRATCH];
903 resource_size_t rmmio_base;
904 resource_size_t rmmio_size;
905 void __iomem *rmmio;
907 spinlock_t mmio_idx_lock;
908 struct amdgpu_mmio_remap rmmio_remap;
910 spinlock_t smc_idx_lock;
911 amdgpu_rreg_t smc_rreg;
912 amdgpu_wreg_t smc_wreg;
914 spinlock_t pcie_idx_lock;
915 amdgpu_rreg_t pcie_rreg;
916 amdgpu_wreg_t pcie_wreg;
917 amdgpu_rreg_t pciep_rreg;
918 amdgpu_wreg_t pciep_wreg;
919 amdgpu_rreg_ext_t pcie_rreg_ext;
920 amdgpu_wreg_ext_t pcie_wreg_ext;
921 amdgpu_rreg64_t pcie_rreg64;
922 amdgpu_wreg64_t pcie_wreg64;
923 amdgpu_rreg64_ext_t pcie_rreg64_ext;
924 amdgpu_wreg64_ext_t pcie_wreg64_ext;
926 spinlock_t uvd_ctx_idx_lock;
927 amdgpu_rreg_t uvd_ctx_rreg;
928 amdgpu_wreg_t uvd_ctx_wreg;
930 spinlock_t didt_idx_lock;
931 amdgpu_rreg_t didt_rreg;
932 amdgpu_wreg_t didt_wreg;
934 spinlock_t gc_cac_idx_lock;
935 amdgpu_rreg_t gc_cac_rreg;
936 amdgpu_wreg_t gc_cac_wreg;
938 spinlock_t se_cac_idx_lock;
939 amdgpu_rreg_t se_cac_rreg;
940 amdgpu_wreg_t se_cac_wreg;
942 spinlock_t audio_endpt_idx_lock;
943 amdgpu_block_rreg_t audio_endpt_rreg;
944 amdgpu_block_wreg_t audio_endpt_wreg;
945 struct amdgpu_doorbell doorbell;
948 struct amdgpu_clock clock;
951 struct amdgpu_gmc gmc;
952 struct amdgpu_gart gart;
953 dma_addr_t dummy_page_addr;
954 struct amdgpu_vm_manager vm_manager;
955 struct amdgpu_vmhub vmhub[AMDGPU_MAX_VMHUBS];
981 /* For pre-DCE11. DCE11 and later are in "struct amdgpu_device->dm" */ argument
982 struct delayed_work hotplug_work;
983 struct amdgpu_irq_src crtc_irq;
984 struct amdgpu_irq_src vline0_irq;
985 struct amdgpu_irq_src vupdate_irq;
986 struct amdgpu_irq_src pageflip_irq;
987 struct amdgpu_irq_src hpd_irq;
988 struct amdgpu_irq_src dmub_trace_irq;
989 struct amdgpu_irq_src dmub_outbox_irq;
992 u64 fence_context;
993 unsigned num_rings;
994 struct amdgpu_ring *rings[AMDGPU_MAX_RINGS];
995 struct dma_fence __rcu *gang_submit;
996 bool ib_pool_ready;
997 struct amdgpu_sa_manager ib_pools[AMDGPU_IB_POOL_MAX];
998 struct amdgpu_sched gpu_sched[AMDGPU_HW_IP_NUM][AMDGPU_RING_PRIO_MAX];
1001 struct amdgpu_irq irq;
1004 struct amd_powerplay powerplay;
1005 struct amdgpu_pm pm;
1006 u64 cg_flags;
1007 u32 pg_flags;
1010 struct amdgpu_nbio nbio;
1013 struct amdgpu_hdp hdp;
1016 struct amdgpu_smuio smuio;
1019 struct amdgpu_mmhub mmhub;
1022 struct amdgpu_gfxhub gfxhub;
1025 struct amdgpu_gfx gfx;
1028 struct amdgpu_sdma sdma;
1031 struct amdgpu_lsdma lsdma;
1034 struct amdgpu_uvd uvd;
1037 struct amdgpu_vce vce;
1040 struct amdgpu_vcn vcn;
1043 struct amdgpu_jpeg jpeg;
1046 struct amdgpu_vpe vpe;
1049 struct amdgpu_umsch_mm umsch_mm;
1050 bool enable_umsch_mm;
1053 struct amdgpu_firmware firmware;
1056 struct psp_context psp;
1059 struct amdgpu_gds gds;
1062 struct amdgpu_seq64 seq64;
1065 struct amdgpu_kfd_dev kfd;
1068 struct amdgpu_umc umc;
1071 struct amdgpu_display_manager dm;
1075 struct amdgpu_isp isp;
1079 bool enable_mes;
1080 bool enable_mes_kiq;
1081 bool enable_uni_mes;
1082 struct amdgpu_mes mes;
1083 struct amdgpu_mqd mqds[AMDGPU_HW_IP_NUM];
1086 struct amdgpu_df df;
1089 struct amdgpu_mca mca;
1092 struct amdgpu_aca aca;
1095 struct amdgpu_cper cper;
1097 struct amdgpu_ip_block ip_blocks[AMDGPU_MAX_IP_NUM];
1098 uint32_t harvest_ip_mask;
1099 int num_ip_blocks;
1100 struct mutex mn_lock;
1104 atomic64_t vram_pin_size;
1105 atomic64_t visible_pin_size;
1106 atomic64_t gart_pin_size;
1109 uint32_t *reg_offset[MAX_HWIP][HWIP_MAX_INSTANCE];
1110 struct amdgpu_ip_map_info ip_map;
1113 struct delayed_work delayed_init_work;
1115 struct amdgpu_virt virt;
1118 bool has_hw_reset;
1119 u8 reset_magic[AMDGPU_RESET_MAGIC_NUM];
1122 bool in_suspend;
1123 bool in_s3;
1124 bool in_s4;
1125 bool in_s0ix;
1126 suspend_state_t last_suspend_state;
1128 enum pp_mp1_state mp1_state;
1129 struct amdgpu_doorbell_index doorbell_index;
1131 struct mutex notifier_lock;
1133 int asic_reset_res;
1134 struct work_struct xgmi_reset_work;
1135 struct list_head reset_list;
1137 long gfx_timeout;
1138 long sdma_timeout;
1139 long video_timeout;
1140 long compute_timeout;
1141 long psp_timeout;
1143 uint64_t unique_id;
1144 uint64_t df_perfmon_config_assign_mask[AMDGPU_MAX_DF_PERFMONS];
1147 bool in_runpm;
1148 bool has_pr3;
1150 bool ucode_sysfs_en;
1152 struct amdgpu_fru_info *fru_info;
1153 atomic_t throttling_logging_enabled;
1154 struct ratelimit_state throttling_logging_rs;
1155 uint32_t ras_hw_enabled;
1156 uint32_t ras_enabled;
1157 bool ras_default_ecc_enabled;
1159 bool no_hw_access;
1160 struct pci_saved_state *pci_state;
1161 pci_channel_state_t pci_channel_state;
1164 bool barrier_has_auto_waitcnt;
1166 struct amdgpu_reset_control *reset_cntl;
1167 uint32_t ip_versions[MAX_HWIP][HWIP_MAX_INSTANCE];
1169 bool ram_is_direct_mapped;
1171 struct list_head ras_list;
1173 struct ip_discovery_top *ip_top;
1175 struct amdgpu_reset_domain *reset_domain;
1177 struct mutex benchmark_mutex;
1179 bool scpm_enabled;
1180 uint32_t scpm_status;
1182 struct work_struct reset_work;
1184 bool dc_enabled;
1186 uint32_t aid_mask;
1189 bool debug_vm;
1190 bool debug_largebar;
1191 bool debug_disable_soft_recovery;
1215 static inline uint32_t amdgpu_ip_version(const struct amdgpu_device *adev, in amdgpu_ip_version() argument