Lines Matching +full:h7 +full:- +full:display +full:- +full:pipe
1 // SPDX-License-Identifier: GPL-2.0-only
65 * The modesetting driver does not check the non-desktop connector in adp_open()
71 if (current->comm[0] == 'X') in adp_open()
72 return -EBUSY; in adp_open()
95 args->height = ALIGN(args->height, 64); in adp_drm_gem_dumb_create()
96 args->size = args->pitch * args->height; in adp_drm_gem_dumb_create()
106 .desc = "Apple Display Pipe DRM Driver",
138 if (!new_plane_state->crtc) in adp_plane_atomic_check()
141 crtc_state = drm_atomic_get_crtc_state(state, new_plane_state->crtc); in adp_plane_atomic_check()
165 fb = new_state->fb; in adp_plane_atomic_update()
168 adp = to_adp(plane->dev); in adp_plane_atomic_update()
170 drm_rect_fp_to_int(&src_rect, &new_state->src); in adp_plane_atomic_update()
172 dst_pos = new_state->dst.x1 << 16 | new_state->dst.y1; in adp_plane_atomic_update()
174 dst_size = drm_rect_width(&new_state->dst) << 16 | in adp_plane_atomic_update()
175 drm_rect_height(&new_state->dst); in adp_plane_atomic_update()
176 writel(src_pos, adp->be + ADBE_SRC_START); in adp_plane_atomic_update()
177 writel(src_size, adp->be + ADBE_SRC_SIZE); in adp_plane_atomic_update()
178 writel(dst_pos, adp->be + ADBE_DST_START); in adp_plane_atomic_update()
179 writel(dst_size, adp->be + ADBE_DST_SIZE); in adp_plane_atomic_update()
180 writel(fb->pitches[0], adp->be + ADBE_STRIDE); in adp_plane_atomic_update()
183 writel(obj->dma_addr + fb->offsets[0], adp->be + ADBE_FB_BASE); in adp_plane_atomic_update()
185 writel(BIT(0), adp->be + ADBE_LAYER_EN1); in adp_plane_atomic_update()
186 writel(BIT(0), adp->be + ADBE_LAYER_EN2); in adp_plane_atomic_update()
187 writel(BIT(0), adp->be + ADBE_LAYER_EN3); in adp_plane_atomic_update()
188 writel(BIT(0), adp->be + ADBE_LAYER_EN4); in adp_plane_atomic_update()
189 writel(ADBE_SCALE_CTL_BYPASS, adp->be + ADBE_SCALE_CTL); in adp_plane_atomic_update()
190 writel(ADBE_LAYER_CTL_ENABLE | BIT(0), adp->be + ADBE_LAYER_CTL); in adp_plane_atomic_update()
191 writel(ADBE_PIX_FMT_XRGB32, adp->be + ADBE_PIX_FMT); in adp_plane_atomic_update()
197 struct adp_drv_private *adp = to_adp(plane->dev); in adp_plane_atomic_disable()
199 writel(0x0, adp->be + ADBE_LAYER_EN1); in adp_plane_atomic_disable()
200 writel(0x0, adp->be + ADBE_LAYER_EN2); in adp_plane_atomic_disable()
201 writel(0x0, adp->be + ADBE_LAYER_EN3); in adp_plane_atomic_disable()
202 writel(0x0, adp->be + ADBE_LAYER_EN4); in adp_plane_atomic_disable()
203 writel(ADBE_LAYER_CTL_ENABLE, adp->be + ADBE_LAYER_CTL); in adp_plane_atomic_disable()
227 struct drm_device *drm = &adp->drm; in adp_plane_new()
247 writel(ADP_INT_STATUS_INT_MASK, adp->fe + ADP_INT_STATUS); in adp_enable_vblank()
249 cur_ctrl = readl(adp->fe + ADP_CTRL); in adp_enable_vblank()
250 writel(cur_ctrl | ADP_CTRL_VBLANK_ON, adp->fe + ADP_CTRL); in adp_enable_vblank()
255 struct drm_device *dev = crtc->dev; in adp_crtc_enable_vblank()
267 cur_ctrl = readl(adp->fe + ADP_CTRL); in adp_disable_vblank()
268 writel(cur_ctrl & ~ADP_CTRL_VBLANK_ON, adp->fe + ADP_CTRL); in adp_disable_vblank()
269 writel(ADP_INT_STATUS_INT_MASK, adp->fe + ADP_INT_STATUS); in adp_disable_vblank()
274 struct drm_device *dev = crtc->dev; in adp_crtc_disable_vblank()
285 writel(BIT(0), adp->be + ADBE_BLEND_EN2); in adp_crtc_atomic_enable()
286 writel(BIT(4), adp->be + ADBE_BLEND_EN1); in adp_crtc_atomic_enable()
287 writel(BIT(0), adp->be + ADBE_BLEND_EN3); in adp_crtc_atomic_enable()
288 writel(BIT(0), adp->be + ADBE_BLEND_BYPASS); in adp_crtc_atomic_enable()
289 writel(BIT(0), adp->be + ADBE_BLEND_EN4); in adp_crtc_atomic_enable()
301 writel(0x0, adp->be + ADBE_BLEND_EN2); in adp_crtc_atomic_disable()
302 writel(0x0, adp->be + ADBE_BLEND_EN1); in adp_crtc_atomic_disable()
303 writel(0x0, adp->be + ADBE_BLEND_EN3); in adp_crtc_atomic_disable()
304 writel(0x0, adp->be + ADBE_BLEND_BYPASS); in adp_crtc_atomic_disable()
305 writel(0x0, adp->be + ADBE_BLEND_EN4); in adp_crtc_atomic_disable()
316 u64 new_size = ALIGN(new_state->mode.hdisplay * in adp_crtc_atomic_flush()
317 new_state->mode.vdisplay * 4, PAGE_SIZE); in adp_crtc_atomic_flush()
319 if (new_size != adp->mask_buf_size) { in adp_crtc_atomic_flush()
320 if (adp->mask_buf) in adp_crtc_atomic_flush()
321 dma_free_coherent(crtc->dev->dev, adp->mask_buf_size, in adp_crtc_atomic_flush()
322 adp->mask_buf, adp->mask_iova); in adp_crtc_atomic_flush()
323 adp->mask_buf = NULL; in adp_crtc_atomic_flush()
325 adp->mask_buf = dma_alloc_coherent(crtc->dev->dev, new_size, in adp_crtc_atomic_flush()
326 &adp->mask_iova, GFP_KERNEL); in adp_crtc_atomic_flush()
327 memset(adp->mask_buf, 0xFF, new_size); in adp_crtc_atomic_flush()
328 writel(adp->mask_iova, adp->be + ADBE_MASK_BUF); in adp_crtc_atomic_flush()
330 adp->mask_buf_size = new_size; in adp_crtc_atomic_flush()
332 writel(ADBE_FIFO_SYNC | frame_num, adp->be + ADBE_FIFO); in adp_crtc_atomic_flush()
334 if (crtc->state->event) { in adp_crtc_atomic_flush()
335 struct drm_pending_vblank_event *event = crtc->state->event; in adp_crtc_atomic_flush()
337 crtc->state->event = NULL; in adp_crtc_atomic_flush()
338 spin_lock_irqsave(&crtc->dev->event_lock, flags); in adp_crtc_atomic_flush()
343 adp->event = event; in adp_crtc_atomic_flush()
345 spin_unlock_irqrestore(&crtc->dev->event_lock, flags); in adp_crtc_atomic_flush()
369 struct drm_device *drm = &adp->drm; in adp_setup_crtc()
377 ret = drm_crtc_init_with_planes(drm, &adp->crtc, primary, in adp_setup_crtc()
382 drm_crtc_helper_add(&adp->crtc, &adp_crtc_helper_funcs); in adp_setup_crtc()
394 struct drm_device *drm = &adp->drm; in adp_setup_mode_config()
405 * used as simple check for non-desktop devices. in adp_setup_mode_config()
407 * "non-desktop" property. The max frame buffer width or height can be in adp_setup_mode_config()
412 size = readl(adp->fe + ADP_SCREEN_SIZE); in adp_setup_mode_config()
414 drm->mode_config.min_width = 32; in adp_setup_mode_config()
415 drm->mode_config.min_height = 32; in adp_setup_mode_config()
416 drm->mode_config.max_width = ALIGN(FIELD_GET(ADP_SCREEN_HSIZE, size), 64); in adp_setup_mode_config()
417 drm->mode_config.max_height = ALIGN(FIELD_GET(ADP_SCREEN_VSIZE, size), 64); in adp_setup_mode_config()
418 drm->mode_config.preferred_depth = 24; in adp_setup_mode_config()
419 drm->mode_config.prefer_shadow = 0; in adp_setup_mode_config()
420 drm->mode_config.funcs = &adp_mode_config_funcs; in adp_setup_mode_config()
428 adp->encoder = drmm_plain_encoder_alloc(drm, NULL, DRM_MODE_ENCODER_DSI, NULL); in adp_setup_mode_config()
429 if (IS_ERR(adp->encoder)) { in adp_setup_mode_config()
431 return PTR_ERR(adp->encoder); in adp_setup_mode_config()
433 adp->encoder->possible_crtcs = ALL_CRTCS; in adp_setup_mode_config()
435 ret = drm_bridge_attach(adp->encoder, adp->next_bridge, NULL, in adp_setup_mode_config()
442 adp->connector = drm_bridge_connector_init(drm, adp->encoder); in adp_setup_mode_config()
443 if (IS_ERR(adp->connector)) in adp_setup_mode_config()
444 return PTR_ERR(adp->connector); in adp_setup_mode_config()
446 drm_connector_attach_encoder(adp->connector, adp->encoder); in adp_setup_mode_config()
448 ret = drm_vblank_init(drm, drm->mode_config.num_crtc); in adp_setup_mode_config()
461 struct device *dev = &pdev->dev; in adp_parse_of()
463 adp->be = devm_platform_ioremap_resource_byname(pdev, "be"); in adp_parse_of()
464 if (IS_ERR(adp->be)) { in adp_parse_of()
465 dev_err(dev, "failed to map display backend mmio"); in adp_parse_of()
466 return PTR_ERR(adp->be); in adp_parse_of()
469 adp->fe = devm_platform_ioremap_resource_byname(pdev, "fe"); in adp_parse_of()
470 if (IS_ERR(adp->fe)) { in adp_parse_of()
471 dev_err(dev, "failed to map display pipe mmio"); in adp_parse_of()
472 return PTR_ERR(adp->fe); in adp_parse_of()
475 adp->be_irq = platform_get_irq_byname(pdev, "be"); in adp_parse_of()
476 if (adp->be_irq < 0) in adp_parse_of()
477 return adp->be_irq; in adp_parse_of()
479 adp->fe_irq = platform_get_irq_byname(pdev, "fe"); in adp_parse_of()
480 if (adp->fe_irq < 0) in adp_parse_of()
481 return adp->fe_irq; in adp_parse_of()
492 int_status = readl(adp->fe + ADP_INT_STATUS); in adp_fe_irq()
494 drm_crtc_handle_vblank(&adp->crtc); in adp_fe_irq()
495 spin_lock(&adp->crtc.dev->event_lock); in adp_fe_irq()
496 if (adp->event) { in adp_fe_irq()
497 int_ctl = readl(adp->fe + ADP_CTRL); in adp_fe_irq()
499 drm_crtc_send_vblank_event(&adp->crtc, adp->event); in adp_fe_irq()
500 adp->event = NULL; in adp_fe_irq()
501 drm_crtc_vblank_put(&adp->crtc); in adp_fe_irq()
504 spin_unlock(&adp->crtc.dev->event_lock); in adp_fe_irq()
507 writel(int_status, adp->fe + ADP_INT_STATUS); in adp_fe_irq()
519 writel(ADP_CTRL_FIFO_ON, adp->fe + ADP_CTRL); in adp_drm_bind()
521 adp->next_bridge = drmm_of_get_bridge(&adp->drm, dev->of_node, 0, 0); in adp_drm_bind()
522 if (IS_ERR(adp->next_bridge)) { in adp_drm_bind()
524 return PTR_ERR(adp->next_bridge); in adp_drm_bind()
531 err = request_irq(adp->fe_irq, adp_fe_irq, 0, "adp-fe", adp); in adp_drm_bind()
535 err = drm_dev_register(&adp->drm, 0); in adp_drm_bind()
549 free_irq(adp->fe_irq, adp); in adp_drm_unbind()
559 return dev->of_node == data; in compare_dev()
569 adp = devm_drm_dev_alloc(&pdev->dev, &adp_driver, struct adp_drv_private, drm); in adp_probe()
573 dev_set_drvdata(&pdev->dev, &adp->drm); in adp_probe()
579 port = of_graph_get_remote_node(pdev->dev.of_node, 0, 0); in adp_probe()
581 return -ENODEV; in adp_probe()
583 drm_of_component_match_add(&pdev->dev, &match, compare_dev, port); in adp_probe()
586 return component_master_add_with_match(&pdev->dev, &adp_master_ops, match); in adp_probe()
591 component_master_del(&pdev->dev, &adp_master_ops); in adp_remove()
592 dev_set_drvdata(&pdev->dev, NULL); in adp_remove()
596 { .compatible = "apple,h7-display-pipe", },
612 MODULE_DESCRIPTION("Apple Display Pipe DRM driver");