Lines Matching +full:reset +full:- +full:gpios
1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2007-2008 MontaVista Software, Inc.
26 #include "gpiolib-of.h"
29 * This is Linux-specific flags. By default controllers' and Linux' mapping
31 * Linux-specific in their .xlate callback. Though, 1:1 mapping is recommended.
44 * of_gpio_named_count() - Count GPIOs for a device
45 * @np: device node to count GPIOs for
48 * The function returns the count of GPIOs specified for a node.
52 * Either number of GPIOs defined in the property, or
53 * * %-EINVAL for an incorrectly formed "gpios" property, or
54 * * %-ENOENT for a missing "gpios" property.
58 * gpios = <0
63 * The above example defines four GPIOs, two of which are not specified.
69 return of_count_phandle_with_args(np, propname, "#gpio-cells"); in of_gpio_named_count()
73 * of_gpio_spi_cs_get_count() - special GPIO counting for SPI
79 * established "cs-gpios" for chip selects but instead rely on
80 * "gpios" for the chip select lines. If we detect this, we redirect
81 * the counting of "cs-gpios" to count "gpios" transparent to the
85 * Either number of GPIOs defined in the property, or
86 * * %-EINVAL for an incorrectly formed "gpios" property, or
87 * * %-ENOENT for a missing "gpios" property.
98 !of_device_is_compatible(np, "ibm,ppc4xx-spi")) in of_gpio_spi_cs_get_count()
100 return of_gpio_named_count(np, "gpios"); in of_gpio_spi_cs_get_count()
118 return ret ? ret : -ENOENT; in of_gpio_count()
126 return device_match_of_node(&chip->gpiodev->dev, gpiospec->np) && in of_gpiochip_match_node_and_xlate()
127 chip->of_xlate && in of_gpiochip_match_node_and_xlate()
128 chip->of_xlate(chip, gpiospec, NULL) >= 0; in of_gpiochip_match_node_and_xlate()
143 if (chip->of_gpio_n_cells != gpiospec->args_count) in of_xlate_and_get_gpiod_flags()
144 return ERR_PTR(-EINVAL); in of_xlate_and_get_gpiod_flags()
146 ret = chip->of_xlate(chip, gpiospec, flags); in of_xlate_and_get_gpiod_flags()
163 pr_warn("%s GPIO handle specifies active low - ignored\n", in of_gpio_quirk_polarity()
187 } gpios[] = { in of_gpio_try_fixup_polarity() local
191 * "gpios-reset" property and also specified wrong in of_gpio_try_fixup_polarity()
194 { "himax,hx8357", "gpios-reset", false }, in of_gpio_try_fixup_polarity()
195 { "himax,hx8369", "gpios-reset", false }, in of_gpio_try_fixup_polarity()
199 * The rb-gpios semantics was undocumented and qi,lb60 (along with in of_gpio_try_fixup_polarity()
202 * inverter on this board, it should be active-high. Let's fix that in of_gpio_try_fixup_polarity()
203 * here for older DTs so we can re-use the generic nand_gpio_waitrdy() in of_gpio_try_fixup_polarity()
206 { "qi,lb60", "rb-gpios", true }, in of_gpio_try_fixup_polarity()
210 * According to the datasheet, the NRST pin 27 is an active-low in of_gpio_try_fixup_polarity()
212 * the out-of-tree implementations have been used for a long in of_gpio_try_fixup_polarity()
213 * time incorrectly by describing reset GPIO as active-high. in of_gpio_try_fixup_polarity()
215 { "cascoda,ca8210", "reset-gpio", false }, in of_gpio_try_fixup_polarity()
220 * active-low signal. However, most of the device trees that in of_gpio_try_fixup_polarity()
222 * reset GPIO as active-high, and were also using wrong name in of_gpio_try_fixup_polarity()
225 { "lantiq,pci-xway", "gpio-reset", false }, in of_gpio_try_fixup_polarity()
230 * polarity for the reset line, while the chip actually in of_gpio_try_fixup_polarity()
233 { "ti,tsc2005", "reset-gpios", false }, in of_gpio_try_fixup_polarity()
238 for (i = 0; i < ARRAY_SIZE(gpios); i++) { in of_gpio_try_fixup_polarity()
239 if (of_device_is_compatible(np, gpios[i].compatible) && in of_gpio_try_fixup_polarity()
240 !strcmp(propname, gpios[i].propname)) { in of_gpio_try_fixup_polarity()
241 of_gpio_quirk_polarity(np, gpios[i].active_high, flags); in of_gpio_try_fixup_polarity()
257 } gpios[] = { in of_gpio_set_polarity_by_property() local
260 { "fsl,imx25-fec", "phy-reset-gpios", "phy-reset-active-high" }, in of_gpio_set_polarity_by_property()
261 { "fsl,imx27-fec", "phy-reset-gpios", "phy-reset-active-high" }, in of_gpio_set_polarity_by_property()
262 { "fsl,imx28-fec", "phy-reset-gpios", "phy-reset-active-high" }, in of_gpio_set_polarity_by_property()
263 { "fsl,imx6q-fec", "phy-reset-gpios", "phy-reset-active-high" }, in of_gpio_set_polarity_by_property()
264 { "fsl,mvf600-fec", "phy-reset-gpios", "phy-reset-active-high" }, in of_gpio_set_polarity_by_property()
265 { "fsl,imx6sx-fec", "phy-reset-gpios", "phy-reset-active-high" }, in of_gpio_set_polarity_by_property()
266 { "fsl,imx6ul-fec", "phy-reset-gpios", "phy-reset-active-high" }, in of_gpio_set_polarity_by_property()
267 { "fsl,imx8mq-fec", "phy-reset-gpios", "phy-reset-active-high" }, in of_gpio_set_polarity_by_property()
268 { "fsl,imx8qm-fec", "phy-reset-gpios", "phy-reset-active-high" }, in of_gpio_set_polarity_by_property()
269 { "fsl,s32v234-fec", "phy-reset-gpios", "phy-reset-active-high" }, in of_gpio_set_polarity_by_property()
272 { "atmel,hsmci", "cd-gpios", "cd-inverted" }, in of_gpio_set_polarity_by_property()
275 { "fsl,imx6q-pcie", "reset-gpio", "reset-gpio-active-high" }, in of_gpio_set_polarity_by_property()
276 { "fsl,imx6sx-pcie", "reset-gpio", "reset-gpio-active-high" }, in of_gpio_set_polarity_by_property()
277 { "fsl,imx6qp-pcie", "reset-gpio", "reset-gpio-active-high" }, in of_gpio_set_polarity_by_property()
278 { "fsl,imx7d-pcie", "reset-gpio", "reset-gpio-active-high" }, in of_gpio_set_polarity_by_property()
279 { "fsl,imx8mq-pcie", "reset-gpio", "reset-gpio-active-high" }, in of_gpio_set_polarity_by_property()
280 { "fsl,imx8mm-pcie", "reset-gpio", "reset-gpio-active-high" }, in of_gpio_set_polarity_by_property()
281 { "fsl,imx8mp-pcie", "reset-gpio", "reset-gpio-active-high" }, in of_gpio_set_polarity_by_property()
286 * presence or absence of "enable-active-high" solely controls in of_gpio_set_polarity_by_property()
291 { "regulator-fixed", "gpios", "enable-active-high" }, in of_gpio_set_polarity_by_property()
292 { "regulator-fixed", "gpio", "enable-active-high" }, in of_gpio_set_polarity_by_property()
293 { "reg-fixed-voltage", "gpios", "enable-active-high" }, in of_gpio_set_polarity_by_property()
294 { "reg-fixed-voltage", "gpio", "enable-active-high" }, in of_gpio_set_polarity_by_property()
297 { "regulator-gpio", "enable-gpio", "enable-active-high" }, in of_gpio_set_polarity_by_property()
298 { "regulator-gpio", "enable-gpios", "enable-active-high" }, in of_gpio_set_polarity_by_property()
309 if (of_device_is_compatible(np->parent, "atmel,hsmci")) { in of_gpio_set_polarity_by_property()
310 np_compat = np->parent; in of_gpio_set_polarity_by_property()
315 for (i = 0; i < ARRAY_SIZE(gpios); i++) { in of_gpio_set_polarity_by_property()
316 if (of_device_is_compatible(np_compat, gpios[i].compatible) && in of_gpio_set_polarity_by_property()
317 !strcmp(propname, gpios[i].gpio_propname)) { in of_gpio_set_polarity_by_property()
319 gpios[i].polarity_propname); in of_gpio_set_polarity_by_property()
338 of_device_is_compatible(np, "reg-fixed-voltage") && in of_gpio_flags_quirks()
339 of_property_read_bool(np, "gpio-open-drain")) { in of_gpio_flags_quirks()
341 pr_info("%s uses legacy open drain flag - update the DTS if you can\n", in of_gpio_flags_quirks()
347 * property named "cs-gpios" we need to inspect the child node in of_gpio_flags_quirks()
350 if (IS_ENABLED(CONFIG_SPI_MASTER) && !strcmp(propname, "cs-gpios") && in of_gpio_flags_quirks()
351 of_property_present(np, "cs-gpios")) { in of_gpio_flags_quirks()
363 * by just omitting "spi-cs-high" in the in of_gpio_flags_quirks()
368 * and has the "spi-cs-high" set, we get a in of_gpio_flags_quirks()
369 * conflict and the "spi-cs-high" flag will in of_gpio_flags_quirks()
373 "spi-cs-high"); in of_gpio_flags_quirks()
381 /* Legacy handling of stmmac's active-low PHY reset line */ in of_gpio_flags_quirks()
383 !strcmp(propname, "snps,reset-gpio") && in of_gpio_flags_quirks()
384 of_property_read_bool(np, "snps,reset-active-low")) in of_gpio_flags_quirks()
389 * of_get_named_gpiod_flags() - Get a GPIO descriptor and flags for GPIO API
418 desc = ERR_PTR(-EPROBE_DEFER); in of_get_named_gpiod_flags()
430 pr_debug("%s: parsed '%s' property of node '%pOF[%d]' - status (%d)\n", in of_get_named_gpiod_flags()
441 * of_get_named_gpio() - Get a GPIO number to use with GPIO API
503 const char *legacy_id; /* NULL - same as con_id */ in of_find_gpio_rename()
512 } gpios[] = { in of_find_gpio_rename() local
514 /* Himax LCD controllers used "gpios-reset" */ in of_find_gpio_rename()
515 { "reset", "gpios-reset", "himax,hx8357" }, in of_find_gpio_rename()
516 { "reset", "gpios-reset", "himax,hx8369" }, in of_find_gpio_rename()
519 { "wlf,reset", NULL, NULL }, in of_find_gpio_rename()
522 { "rtc-data", "gpio-rtc-data", "moxa,moxart-rtc" }, in of_find_gpio_rename()
523 { "rtc-sclk", "gpio-rtc-sclk", "moxa,moxart-rtc" }, in of_find_gpio_rename()
524 { "rtc-reset", "gpio-rtc-reset", "moxa,moxart-rtc" }, in of_find_gpio_rename()
527 { "reset", "reset-n-io", "marvell,nfc-i2c" }, in of_find_gpio_rename()
530 { "reset", "reset-n-io", "marvell,nfc-spi" }, in of_find_gpio_rename()
533 { "reset", "reset-n-io", "marvell,nfc-uart" }, in of_find_gpio_rename()
534 { "reset", "reset-n-io", "mrvl,nfc-uart" }, in of_find_gpio_rename()
538 { "reset", "gpio-reset", "lantiq,pci-xway" }, in of_find_gpio_rename()
544 * "foo-gpios" so we have this special kludge for them. in of_find_gpio_rename()
555 { "reset", "cirrus,gpio-nreset", "cirrus,cs42l56" }, in of_find_gpio_rename()
558 { "i2s1-in-sel-gpio1", NULL, "mediatek,mt2701-cs42448-machine" }, in of_find_gpio_rename()
559 { "i2s1-in-sel-gpio2", NULL, "mediatek,mt2701-cs42448-machine" }, in of_find_gpio_rename()
562 { "reset", "gpio-reset", "ti,tlv320aic3x" }, in of_find_gpio_rename()
563 { "reset", "gpio-reset", "ti,tlv320aic33" }, in of_find_gpio_rename()
564 { "reset", "gpio-reset", "ti,tlv320aic3007" }, in of_find_gpio_rename()
565 { "reset", "gpio-reset", "ti,tlv320aic3104" }, in of_find_gpio_rename()
566 { "reset", "gpio-reset", "ti,tlv320aic3106" }, in of_find_gpio_rename()
572 * "foo-gpios" so we have this special kludge for them. in of_find_gpio_rename()
574 { "miso", "gpio-miso", "spi-gpio" }, in of_find_gpio_rename()
575 { "mosi", "gpio-mosi", "spi-gpio" }, in of_find_gpio_rename()
576 { "sck", "gpio-sck", "spi-gpio" }, in of_find_gpio_rename()
580 * The old Freescale bindings use simply "gpios" as name in of_find_gpio_rename()
581 * for the chip select lines rather than "cs-gpios" like in of_find_gpio_rename()
586 { "cs", "gpios", "fsl,spi" }, in of_find_gpio_rename()
587 { "cs", "gpios", "aeroflexgaisler,spictrl" }, in of_find_gpio_rename()
590 { "cs", "gpios", "ibm,ppc4xx-spi" }, in of_find_gpio_rename()
596 * property without the compulsory "-gpios" suffix. in of_find_gpio_rename()
606 return ERR_PTR(-ENOENT); in of_find_gpio_rename()
608 for (i = 0; i < ARRAY_SIZE(gpios); i++) { in of_find_gpio_rename()
609 if (strcmp(con_id, gpios[i].con_id)) in of_find_gpio_rename()
612 if (gpios[i].compatible && in of_find_gpio_rename()
613 !of_device_is_compatible(np, gpios[i].compatible)) in of_find_gpio_rename()
616 legacy_id = gpios[i].legacy_id ?: gpios[i].con_id; in of_find_gpio_rename()
619 pr_info("%s uses legacy gpio name '%s' instead of '%s-gpios'\n", in of_find_gpio_rename()
625 return ERR_PTR(-ENOENT); in of_find_gpio_rename()
637 return ERR_PTR(-ENOENT); in of_find_mt2701_gpio()
639 if (!of_device_is_compatible(np, "mediatek,mt2701-cs42448-machine")) in of_find_mt2701_gpio()
640 return ERR_PTR(-ENOENT); in of_find_mt2701_gpio()
642 if (!con_id || strcmp(con_id, "i2s1-in-sel")) in of_find_mt2701_gpio()
643 return ERR_PTR(-ENOENT); in of_find_mt2701_gpio()
646 legacy_id = "i2s1-in-sel-gpio1"; in of_find_mt2701_gpio()
648 legacy_id = "i2s1-in-sel-gpio2"; in of_find_mt2701_gpio()
650 return ERR_PTR(-ENOENT); in of_find_mt2701_gpio()
654 pr_info("%s is using legacy gpio name '%s' instead of '%s-gpios'\n", in of_find_mt2701_gpio()
662 * and have the name "trigger-sources" no matter which kind of phandle it is
664 * we allow looking something up that is not named "foo-gpios".
674 return ERR_PTR(-ENOENT); in of_find_trigger_gpio()
676 if (!con_id || strcmp(con_id, "trigger-sources")) in of_find_trigger_gpio()
677 return ERR_PTR(-ENOENT); in of_find_trigger_gpio()
706 /* Try GPIO property "foo-gpios" and "foo-gpio" */ in of_find_gpio()
726 * of_parse_own_gpio() - Get a GPIO hog descriptor, names and flags for GPIO API
731 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
733 * @dflags: gpiod_flags - optional GPIO initialization flags
753 chip_np = dev_of_node(&chip->gpiodev->dev); in of_parse_own_gpio()
755 return ERR_PTR(-EINVAL); in of_parse_own_gpio()
761 ret = of_property_read_u32(chip_np, "#gpio-cells", &tmp); in of_parse_own_gpio()
769 ret = of_property_read_u32_index(np, "gpios", idx * tmp + i, in of_parse_own_gpio()
783 else if (of_property_read_bool(np, "output-low")) in of_parse_own_gpio()
785 else if (of_property_read_bool(np, "output-high")) in of_parse_own_gpio()
790 return ERR_PTR(-EINVAL); in of_parse_own_gpio()
793 if (name && of_property_read_string(np, "line-name", name)) in of_parse_own_gpio()
794 *name = np->name; in of_parse_own_gpio()
800 * of_gpiochip_add_hog - Add all hogs in a hog device node
826 WRITE_ONCE(desc->hog, hog); in of_gpiochip_add_hog()
834 * of_gpiochip_scan_gpios - Scan gpio-controller for gpio definitions
847 for_each_available_child_of_node_scoped(dev_of_node(&chip->gpiodev->dev), np) { in of_gpiochip_scan_gpios()
848 if (!of_property_read_bool(np, "gpio-hog")) in of_gpiochip_scan_gpios()
863 * of_gpiochip_remove_hog - Remove all hogs in a hog device node
873 if (READ_ONCE(desc->hog) == hog) in of_gpiochip_remove_hog()
879 return device_match_of_node(&chip->gpiodev->dev, data); in of_gpiochip_match_node()
895 * This only supports adding and removing complete gpio-hog nodes. in of_gpio_notify()
896 * Modifying an existing gpio-hog node is not supported (except for in of_gpio_notify()
902 if (!of_property_read_bool(rd->dn, "gpio-hog")) in of_gpio_notify()
905 if (of_node_test_and_set_flag(rd->dn, OF_POPULATED)) in of_gpio_notify()
908 gdev = of_find_gpio_device_by_node(rd->dn->parent); in of_gpio_notify()
912 ret = of_gpiochip_add_hog(gpio_device_get_chip(gdev), rd->dn); in of_gpio_notify()
915 rd->dn); in of_gpio_notify()
916 of_node_clear_flag(rd->dn, OF_POPULATED); in of_gpio_notify()
922 if (!of_node_check_flag(rd->dn, OF_POPULATED)) in of_gpio_notify()
925 gdev = of_find_gpio_device_by_node(rd->dn->parent); in of_gpio_notify()
929 of_gpiochip_remove_hog(gpio_device_get_chip(gdev), rd->dn); in of_gpio_notify()
930 of_node_clear_flag(rd->dn, OF_POPULATED); in of_gpio_notify()
943 * of_gpio_twocell_xlate - translate twocell gpiospec to the GPIO number and flags
962 * number and the flags from a single gpio cell -- this is possible, in of_gpio_twocell_xlate()
965 if (gc->of_gpio_n_cells != 2) { in of_gpio_twocell_xlate()
967 return -EINVAL; in of_gpio_twocell_xlate()
970 if (WARN_ON(gpiospec->args_count < gc->of_gpio_n_cells)) in of_gpio_twocell_xlate()
971 return -EINVAL; in of_gpio_twocell_xlate()
973 if (gpiospec->args[0] >= gc->ngpio) in of_gpio_twocell_xlate()
974 return -EINVAL; in of_gpio_twocell_xlate()
977 *flags = gpiospec->args[1]; in of_gpio_twocell_xlate()
979 return gpiospec->args[0]; in of_gpio_twocell_xlate()
983 * of_gpio_threecell_xlate - translate threecell gpiospec to the GPIO number and flags
992 * foo-gpios = <&gpio instance offset flags>;
1001 if (gc->of_gpio_n_cells != 3) { in of_gpio_threecell_xlate()
1003 return -EINVAL; in of_gpio_threecell_xlate()
1006 if (WARN_ON(gpiospec->args_count != 3)) in of_gpio_threecell_xlate()
1007 return -EINVAL; in of_gpio_threecell_xlate()
1013 if (!gc->of_node_instance_match(gc, gpiospec->args[0])) in of_gpio_threecell_xlate()
1014 return -EINVAL; in of_gpio_threecell_xlate()
1016 if (gpiospec->args[1] >= gc->ngpio) in of_gpio_threecell_xlate()
1017 return -EINVAL; in of_gpio_threecell_xlate()
1020 *flags = gpiospec->args[2]; in of_gpio_threecell_xlate()
1022 return gpiospec->args[1]; in of_gpio_threecell_xlate()
1026 #include <linux/gpio/legacy-of-mm-gpiochip.h>
1028 * of_mm_gpiochip_add_data - Add memory mapped GPIO chip (bank)
1036 * - all the callbacks
1037 * - of_gpio_n_cells
1038 * - of_xlate callback (optional)
1041 * - save_regs callback (optional)
1045 * to manage GPIOs from the callbacks.
1054 int ret = -ENOMEM; in of_mm_gpiochip_add_data()
1055 struct gpio_chip *gc = &mm_gc->gc; in of_mm_gpiochip_add_data()
1057 gc->label = kasprintf(GFP_KERNEL, "%pOF", np); in of_mm_gpiochip_add_data()
1058 if (!gc->label) in of_mm_gpiochip_add_data()
1061 mm_gc->regs = of_iomap(np, 0); in of_mm_gpiochip_add_data()
1062 if (!mm_gc->regs) in of_mm_gpiochip_add_data()
1065 gc->base = -1; in of_mm_gpiochip_add_data()
1067 if (mm_gc->save_regs) in of_mm_gpiochip_add_data()
1068 mm_gc->save_regs(mm_gc); in of_mm_gpiochip_add_data()
1070 fwnode_handle_put(mm_gc->gc.fwnode); in of_mm_gpiochip_add_data()
1071 mm_gc->gc.fwnode = fwnode_handle_get(of_fwnode_handle(np)); in of_mm_gpiochip_add_data()
1080 iounmap(mm_gc->regs); in of_mm_gpiochip_add_data()
1082 kfree(gc->label); in of_mm_gpiochip_add_data()
1090 * of_mm_gpiochip_remove - Remove memory mapped GPIO chip (bank)
1095 struct gpio_chip *gc = &mm_gc->gc; in of_mm_gpiochip_remove()
1098 iounmap(mm_gc->regs); in of_mm_gpiochip_remove()
1099 kfree(gc->label); in of_mm_gpiochip_remove()
1112 static const char group_names_propname[] = "gpio-ranges-group-names"; in of_gpiochip_add_pin_range()
1118 np = dev_of_node(&chip->gpiodev->dev); in of_gpiochip_add_pin_range()
1126 * Ordinary phandles contain 2-3 cells: in of_gpiochip_add_pin_range()
1127 * gpios = <&gpio [instance] offset flags>; in of_gpiochip_add_pin_range()
1129 * gpio-ranges <&pinctrl [gpio_instance] gpio_offet pin_offet count>; in of_gpiochip_add_pin_range()
1130 * This is why we parse chip->of_gpio_n_cells + 1 cells in of_gpiochip_add_pin_range()
1132 ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", in of_gpiochip_add_pin_range()
1133 chip->of_gpio_n_cells + 1, in of_gpiochip_add_pin_range()
1141 return -EPROBE_DEFER; in of_gpiochip_add_pin_range()
1143 if (chip->of_gpio_n_cells == 3) { in of_gpiochip_add_pin_range()
1158 if (chip->of_node_instance_match && in of_gpiochip_add_pin_range()
1159 (chip->of_gpio_n_cells == 3) && in of_gpiochip_add_pin_range()
1160 !chip->of_node_instance_match(chip, pinspec.args[0])) in of_gpiochip_add_pin_range()
1164 if (offset >= (chip->offset + chip->ngpio)) in of_gpiochip_add_pin_range()
1166 if (offset + count <= chip->offset) in of_gpiochip_add_pin_range()
1183 if (chip->offset > offset) { in of_gpiochip_add_pin_range()
1184 trim = chip->offset - offset; in of_gpiochip_add_pin_range()
1185 count -= trim; in of_gpiochip_add_pin_range()
1189 offset -= chip->offset; in of_gpiochip_add_pin_range()
1191 if ((offset + count) > chip->ngpio) in of_gpiochip_add_pin_range()
1192 count = chip->ngpio - offset; in of_gpiochip_add_pin_range()
1204 pr_err("%pOF: Illegal gpio-range format.\n", in of_gpiochip_add_pin_range()
1246 np = dev_of_node(&chip->gpiodev->dev); in of_gpiochip_add()
1250 if (!chip->of_xlate) { in of_gpiochip_add()
1251 if (chip->of_gpio_n_cells == 3) { in of_gpiochip_add()
1252 if (!chip->of_node_instance_match) in of_gpiochip_add()
1253 return -EINVAL; in of_gpiochip_add()
1254 chip->of_xlate = of_gpio_threecell_xlate; in of_gpiochip_add()
1256 chip->of_gpio_n_cells = 2; in of_gpiochip_add()
1257 chip->of_xlate = of_gpio_twocell_xlate; in of_gpiochip_add()
1261 if (chip->of_gpio_n_cells > MAX_PHANDLE_ARGS) in of_gpiochip_add()
1262 return -EINVAL; in of_gpiochip_add()
1279 of_node_put(dev_of_node(&chip->gpiodev->dev)); in of_gpiochip_remove()