Lines Matching +full:edge +full:- +full:sensitive
1 // SPDX-License-Identifier: GPL-2.0
3 * Renesas R-Car GPIO Support
61 #define EDGLEVEL 0x24 /* Edge/level Select Register */
64 #define BOTHEDGE 0x4c /* One Edge/Both Edge Select Register */
71 return ioread32(p->base + offs); in gpio_rcar_read()
77 iowrite32(value, p->base + offs); in gpio_rcar_write()
122 * "Setting Edge-Sensitive Interrupt Input Mode" and in gpio_rcar_config_interrupt_input_mode()
123 * "Setting Level-Sensitive Interrupt Input Mode" in gpio_rcar_config_interrupt_input_mode()
126 raw_spin_lock_irqsave(&p->lock, flags); in gpio_rcar_config_interrupt_input_mode()
131 /* Configure edge or level trigger in EDGLEVEL */ in gpio_rcar_config_interrupt_input_mode()
134 /* Select one edge or both edges in BOTHEDGE */ in gpio_rcar_config_interrupt_input_mode()
135 if (p->info.has_both_edge_trigger) in gpio_rcar_config_interrupt_input_mode()
141 /* Write INTCLR in case of edge trigger */ in gpio_rcar_config_interrupt_input_mode()
145 raw_spin_unlock_irqrestore(&p->lock, flags); in gpio_rcar_config_interrupt_input_mode()
154 dev_dbg(p->dev, "sense irq = %d, type = %d\n", hwirq, type); in gpio_rcar_irq_set_type()
174 if (!p->info.has_both_edge_trigger) in gpio_rcar_irq_set_type()
175 return -EINVAL; in gpio_rcar_irq_set_type()
180 return -EINVAL; in gpio_rcar_irq_set_type()
191 if (p->irq_parent) { in gpio_rcar_irq_set_wake()
192 error = irq_set_irq_wake(p->irq_parent, on); in gpio_rcar_irq_set_wake()
194 dev_dbg(p->dev, "irq %u doesn't support irq_set_wake\n", in gpio_rcar_irq_set_wake()
195 p->irq_parent); in gpio_rcar_irq_set_wake()
196 p->irq_parent = 0; in gpio_rcar_irq_set_wake()
201 atomic_inc(&p->wakeup_path); in gpio_rcar_irq_set_wake()
203 atomic_dec(&p->wakeup_path); in gpio_rcar_irq_set_wake()
209 .name = "gpio-rcar",
229 generic_handle_domain_irq(p->gpio_chip.irq.domain, in gpio_rcar_irq_handler()
249 raw_spin_lock_irqsave(&p->lock, flags); in gpio_rcar_config_general_input_output_mode()
261 if (p->info.has_outdtsel && output) in gpio_rcar_config_general_input_output_mode()
264 raw_spin_unlock_irqrestore(&p->lock, flags); in gpio_rcar_config_general_input_output_mode()
272 error = pm_runtime_get_sync(p->dev); in gpio_rcar_request()
274 pm_runtime_put(p->dev); in gpio_rcar_request()
280 pm_runtime_put(p->dev); in gpio_rcar_request()
297 pm_runtime_put(p->dev); in gpio_rcar_free()
322 * Before R-Car Gen3, INDT does not show correct pin state when in gpio_rcar_get()
325 if (!p->info.has_always_in && (gpio_rcar_read(p, INOUTSEL) & bit)) in gpio_rcar_get()
338 bankmask = mask[0] & GENMASK(chip->ngpio - 1, 0); in gpio_rcar_get_multiple()
342 if (p->info.has_always_in) { in gpio_rcar_get_multiple()
347 raw_spin_lock_irqsave(&p->lock, flags); in gpio_rcar_get_multiple()
356 raw_spin_unlock_irqrestore(&p->lock, flags); in gpio_rcar_get_multiple()
367 raw_spin_lock_irqsave(&p->lock, flags); in gpio_rcar_set()
369 raw_spin_unlock_irqrestore(&p->lock, flags); in gpio_rcar_set()
379 bankmask = mask[0] & GENMASK(chip->ngpio - 1, 0); in gpio_rcar_set_multiple()
383 raw_spin_lock_irqsave(&p->lock, flags); in gpio_rcar_set_multiple()
388 raw_spin_unlock_irqrestore(&p->lock, flags); in gpio_rcar_set_multiple()
430 .compatible = "renesas,gpio-r8a779a0",
433 .compatible = "renesas,rcar-gen1-gpio",
436 .compatible = "renesas,rcar-gen2-gpio",
439 .compatible = "renesas,rcar-gen3-gpio",
442 .compatible = "renesas,rcar-gen4-gpio",
445 .compatible = "renesas,gpio-rcar",
456 struct device_node *np = p->dev->of_node; in gpio_rcar_parse_dt()
461 info = of_device_get_match_data(p->dev); in gpio_rcar_parse_dt()
462 p->info = *info; in gpio_rcar_parse_dt()
464 ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0, &args); in gpio_rcar_parse_dt()
473 dev_warn(p->dev, "Invalid number of gpio lines %u, using %u\n", in gpio_rcar_parse_dt()
483 u32 mask = GENMASK(p->gpio_chip.ngpio - 1, 0); in gpio_rcar_enable_inputs()
486 valid_mask = gpiochip_query_valid_mask(&p->gpio_chip); in gpio_rcar_enable_inputs()
500 struct device *dev = &pdev->dev; in gpio_rcar_probe()
507 return -ENOMEM; in gpio_rcar_probe()
509 p->dev = dev; in gpio_rcar_probe()
510 raw_spin_lock_init(&p->lock); in gpio_rcar_probe()
524 p->irq_parent = ret; in gpio_rcar_probe()
526 p->base = devm_platform_ioremap_resource(pdev, 0); in gpio_rcar_probe()
527 if (IS_ERR(p->base)) { in gpio_rcar_probe()
528 ret = PTR_ERR(p->base); in gpio_rcar_probe()
532 gpio_chip = &p->gpio_chip; in gpio_rcar_probe()
533 gpio_chip->request = gpio_rcar_request; in gpio_rcar_probe()
534 gpio_chip->free = gpio_rcar_free; in gpio_rcar_probe()
535 gpio_chip->get_direction = gpio_rcar_get_direction; in gpio_rcar_probe()
536 gpio_chip->direction_input = gpio_rcar_direction_input; in gpio_rcar_probe()
537 gpio_chip->get = gpio_rcar_get; in gpio_rcar_probe()
538 gpio_chip->get_multiple = gpio_rcar_get_multiple; in gpio_rcar_probe()
539 gpio_chip->direction_output = gpio_rcar_direction_output; in gpio_rcar_probe()
540 gpio_chip->set = gpio_rcar_set; in gpio_rcar_probe()
541 gpio_chip->set_multiple = gpio_rcar_set_multiple; in gpio_rcar_probe()
542 gpio_chip->label = name; in gpio_rcar_probe()
543 gpio_chip->parent = dev; in gpio_rcar_probe()
544 gpio_chip->owner = THIS_MODULE; in gpio_rcar_probe()
545 gpio_chip->base = -1; in gpio_rcar_probe()
546 gpio_chip->ngpio = npins; in gpio_rcar_probe()
548 girq = &gpio_chip->irq; in gpio_rcar_probe()
551 girq->parent_handler = NULL; in gpio_rcar_probe()
552 girq->num_parents = 0; in gpio_rcar_probe()
553 girq->parents = NULL; in gpio_rcar_probe()
554 girq->default_type = IRQ_TYPE_NONE; in gpio_rcar_probe()
555 girq->handler = handle_level_irq; in gpio_rcar_probe()
563 irq_domain_set_pm_device(gpio_chip->irq.domain, dev); in gpio_rcar_probe()
564 ret = devm_request_irq(dev, p->irq_parent, gpio_rcar_irq_handler, in gpio_rcar_probe()
571 if (p->info.has_inen) { in gpio_rcar_probe()
592 gpiochip_remove(&p->gpio_chip); in gpio_rcar_remove()
594 pm_runtime_disable(&pdev->dev); in gpio_rcar_remove()
602 p->bank_info.iointsel = gpio_rcar_read(p, IOINTSEL); in gpio_rcar_suspend()
603 p->bank_info.inoutsel = gpio_rcar_read(p, INOUTSEL); in gpio_rcar_suspend()
604 p->bank_info.outdt = gpio_rcar_read(p, OUTDT); in gpio_rcar_suspend()
605 p->bank_info.intmsk = gpio_rcar_read(p, INTMSK); in gpio_rcar_suspend()
606 p->bank_info.posneg = gpio_rcar_read(p, POSNEG); in gpio_rcar_suspend()
607 p->bank_info.edglevel = gpio_rcar_read(p, EDGLEVEL); in gpio_rcar_suspend()
608 if (p->info.has_both_edge_trigger) in gpio_rcar_suspend()
609 p->bank_info.bothedge = gpio_rcar_read(p, BOTHEDGE); in gpio_rcar_suspend()
611 if (atomic_read(&p->wakeup_path)) in gpio_rcar_suspend()
623 for (offset = 0; offset < p->gpio_chip.ngpio; offset++) { in gpio_rcar_resume()
624 if (!gpiochip_line_is_valid(&p->gpio_chip, offset)) in gpio_rcar_resume()
629 if (!(p->bank_info.iointsel & mask)) { in gpio_rcar_resume()
630 if (p->bank_info.inoutsel & mask) in gpio_rcar_resume()
632 &p->gpio_chip, offset, in gpio_rcar_resume()
633 !!(p->bank_info.outdt & mask)); in gpio_rcar_resume()
635 gpio_rcar_direction_input(&p->gpio_chip, in gpio_rcar_resume()
642 !(p->bank_info.posneg & mask), in gpio_rcar_resume()
643 !(p->bank_info.edglevel & mask), in gpio_rcar_resume()
644 !!(p->bank_info.bothedge & mask)); in gpio_rcar_resume()
646 if (p->bank_info.intmsk & mask) in gpio_rcar_resume()
651 if (p->info.has_inen) in gpio_rcar_resume()
673 MODULE_DESCRIPTION("Renesas R-Car GPIO Driver");