Lines Matching +full:mbl +full:- +full:gpio

1 // SPDX-License-Identifier: GPL-2.0+
3 * Generic driver for memory-mapped GPIO controllers.
10 * ..The simplest form of a GPIO controller that the driver supports is``
11 * `.just a single "data" register, where GPIO state can be read and/or `
16 __________|~$@~~~ %~ /o*o*o*o*o*o\ .. Implementing such a GPIO .
22 * . big-endian notation, just`. .. A bit more sophisticated controllers ,
23 * . register the device with -be`. .with a pair of set/clear-bit registers ,
29 * .. The expectation is that in at least some cases . ,-~~~-,
30 * .this will be used with roll-your-own ASIC/FPGA .` \ /
59 #include <linux/gpio/driver.h>
127 if (gc->be_bits) in bgpio_line2mask()
128 return BIT(gc->bgpio_bits - 1 - line); in bgpio_line2mask()
132 static int bgpio_get_set(struct gpio_chip *gc, unsigned int gpio) in bgpio_get_set() argument
134 unsigned long pinmask = bgpio_line2mask(gc, gpio); in bgpio_get_set()
135 bool dir = !!(gc->bgpio_dir & pinmask); in bgpio_get_set()
138 return !!(gc->read_reg(gc->reg_set) & pinmask); in bgpio_get_set()
140 return !!(gc->read_reg(gc->reg_dat) & pinmask); in bgpio_get_set()
144 * This assumes that the bits in the GPIO register are in native endianness.
156 set_mask = *mask & gc->bgpio_dir; in bgpio_get_set_multiple()
157 get_mask = *mask & ~gc->bgpio_dir; in bgpio_get_set_multiple()
160 *bits |= gc->read_reg(gc->reg_set) & set_mask; in bgpio_get_set_multiple()
162 *bits |= gc->read_reg(gc->reg_dat) & get_mask; in bgpio_get_set_multiple()
167 static int bgpio_get(struct gpio_chip *gc, unsigned int gpio) in bgpio_get() argument
169 return !!(gc->read_reg(gc->reg_dat) & bgpio_line2mask(gc, gpio)); in bgpio_get()
173 * This only works if the bits in the GPIO register are in native endianness.
180 *bits |= gc->read_reg(gc->reg_dat) & *mask; in bgpio_get_multiple()
198 for_each_set_bit(bit, mask, gc->ngpio) in bgpio_get_multiple_be()
202 val = gc->read_reg(gc->reg_dat) & readmask; in bgpio_get_multiple_be()
208 for_each_set_bit(bit, &val, gc->ngpio) in bgpio_get_multiple_be()
214 static void bgpio_set_none(struct gpio_chip *gc, unsigned int gpio, int val) in bgpio_set_none() argument
218 static void bgpio_set(struct gpio_chip *gc, unsigned int gpio, int val) in bgpio_set() argument
220 unsigned long mask = bgpio_line2mask(gc, gpio); in bgpio_set()
223 raw_spin_lock_irqsave(&gc->bgpio_lock, flags); in bgpio_set()
226 gc->bgpio_data |= mask; in bgpio_set()
228 gc->bgpio_data &= ~mask; in bgpio_set()
230 gc->write_reg(gc->reg_dat, gc->bgpio_data); in bgpio_set()
232 raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); in bgpio_set()
235 static void bgpio_set_with_clear(struct gpio_chip *gc, unsigned int gpio, in bgpio_set_with_clear() argument
238 unsigned long mask = bgpio_line2mask(gc, gpio); in bgpio_set_with_clear()
241 gc->write_reg(gc->reg_set, mask); in bgpio_set_with_clear()
243 gc->write_reg(gc->reg_clr, mask); in bgpio_set_with_clear()
246 static void bgpio_set_set(struct gpio_chip *gc, unsigned int gpio, int val) in bgpio_set_set() argument
248 unsigned long mask = bgpio_line2mask(gc, gpio); in bgpio_set_set()
251 raw_spin_lock_irqsave(&gc->bgpio_lock, flags); in bgpio_set_set()
254 gc->bgpio_data |= mask; in bgpio_set_set()
256 gc->bgpio_data &= ~mask; in bgpio_set_set()
258 gc->write_reg(gc->reg_set, gc->bgpio_data); in bgpio_set_set()
260 raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); in bgpio_set_set()
273 for_each_set_bit(i, mask, gc->bgpio_bits) { in bgpio_multiple_get_masks()
289 raw_spin_lock_irqsave(&gc->bgpio_lock, flags); in bgpio_set_multiple_single_reg()
293 gc->bgpio_data |= set_mask; in bgpio_set_multiple_single_reg()
294 gc->bgpio_data &= ~clear_mask; in bgpio_set_multiple_single_reg()
296 gc->write_reg(reg, gc->bgpio_data); in bgpio_set_multiple_single_reg()
298 raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); in bgpio_set_multiple_single_reg()
304 bgpio_set_multiple_single_reg(gc, mask, bits, gc->reg_dat); in bgpio_set_multiple()
310 bgpio_set_multiple_single_reg(gc, mask, bits, gc->reg_set); in bgpio_set_multiple_set()
322 gc->write_reg(gc->reg_set, set_mask); in bgpio_set_multiple_with_clear()
324 gc->write_reg(gc->reg_clr, clear_mask); in bgpio_set_multiple_with_clear()
327 static int bgpio_dir_return(struct gpio_chip *gc, unsigned int gpio, bool dir_out) in bgpio_dir_return() argument
329 if (!gc->bgpio_pinctrl) in bgpio_dir_return()
333 return pinctrl_gpio_direction_output(gc, gpio); in bgpio_dir_return()
335 return pinctrl_gpio_direction_input(gc, gpio); in bgpio_dir_return()
338 static int bgpio_simple_dir_in(struct gpio_chip *gc, unsigned int gpio) in bgpio_simple_dir_in() argument
340 return bgpio_dir_return(gc, gpio, false); in bgpio_simple_dir_in()
343 static int bgpio_dir_out_err(struct gpio_chip *gc, unsigned int gpio, in bgpio_dir_out_err() argument
346 return -EINVAL; in bgpio_dir_out_err()
349 static int bgpio_simple_dir_out(struct gpio_chip *gc, unsigned int gpio, in bgpio_simple_dir_out() argument
352 gc->set(gc, gpio, val); in bgpio_simple_dir_out()
354 return bgpio_dir_return(gc, gpio, true); in bgpio_simple_dir_out()
357 static int bgpio_dir_in(struct gpio_chip *gc, unsigned int gpio) in bgpio_dir_in() argument
361 raw_spin_lock_irqsave(&gc->bgpio_lock, flags); in bgpio_dir_in()
363 gc->bgpio_dir &= ~bgpio_line2mask(gc, gpio); in bgpio_dir_in()
365 if (gc->reg_dir_in) in bgpio_dir_in()
366 gc->write_reg(gc->reg_dir_in, ~gc->bgpio_dir); in bgpio_dir_in()
367 if (gc->reg_dir_out) in bgpio_dir_in()
368 gc->write_reg(gc->reg_dir_out, gc->bgpio_dir); in bgpio_dir_in()
370 raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); in bgpio_dir_in()
372 return bgpio_dir_return(gc, gpio, false); in bgpio_dir_in()
375 static int bgpio_get_dir(struct gpio_chip *gc, unsigned int gpio) in bgpio_get_dir() argument
378 if (gc->bgpio_dir_unreadable) { in bgpio_get_dir()
379 if (gc->bgpio_dir & bgpio_line2mask(gc, gpio)) in bgpio_get_dir()
384 if (gc->reg_dir_out) { in bgpio_get_dir()
385 if (gc->read_reg(gc->reg_dir_out) & bgpio_line2mask(gc, gpio)) in bgpio_get_dir()
390 if (gc->reg_dir_in) in bgpio_get_dir()
391 if (!(gc->read_reg(gc->reg_dir_in) & bgpio_line2mask(gc, gpio))) in bgpio_get_dir()
397 static void bgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) in bgpio_dir_out() argument
401 raw_spin_lock_irqsave(&gc->bgpio_lock, flags); in bgpio_dir_out()
403 gc->bgpio_dir |= bgpio_line2mask(gc, gpio); in bgpio_dir_out()
405 if (gc->reg_dir_in) in bgpio_dir_out()
406 gc->write_reg(gc->reg_dir_in, ~gc->bgpio_dir); in bgpio_dir_out()
407 if (gc->reg_dir_out) in bgpio_dir_out()
408 gc->write_reg(gc->reg_dir_out, gc->bgpio_dir); in bgpio_dir_out()
410 raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); in bgpio_dir_out()
413 static int bgpio_dir_out_dir_first(struct gpio_chip *gc, unsigned int gpio, in bgpio_dir_out_dir_first() argument
416 bgpio_dir_out(gc, gpio, val); in bgpio_dir_out_dir_first()
417 gc->set(gc, gpio, val); in bgpio_dir_out_dir_first()
418 return bgpio_dir_return(gc, gpio, true); in bgpio_dir_out_dir_first()
421 static int bgpio_dir_out_val_first(struct gpio_chip *gc, unsigned int gpio, in bgpio_dir_out_val_first() argument
424 gc->set(gc, gpio, val); in bgpio_dir_out_val_first()
425 bgpio_dir_out(gc, gpio, val); in bgpio_dir_out_val_first()
426 return bgpio_dir_return(gc, gpio, true); in bgpio_dir_out_val_first()
434 switch (gc->bgpio_bits) { in bgpio_setup_accessors()
436 gc->read_reg = bgpio_read8; in bgpio_setup_accessors()
437 gc->write_reg = bgpio_write8; in bgpio_setup_accessors()
441 gc->read_reg = bgpio_read16be; in bgpio_setup_accessors()
442 gc->write_reg = bgpio_write16be; in bgpio_setup_accessors()
444 gc->read_reg = bgpio_read16; in bgpio_setup_accessors()
445 gc->write_reg = bgpio_write16; in bgpio_setup_accessors()
450 gc->read_reg = bgpio_read32be; in bgpio_setup_accessors()
451 gc->write_reg = bgpio_write32be; in bgpio_setup_accessors()
453 gc->read_reg = bgpio_read32; in bgpio_setup_accessors()
454 gc->write_reg = bgpio_write32; in bgpio_setup_accessors()
462 return -EINVAL; in bgpio_setup_accessors()
464 gc->read_reg = bgpio_read64; in bgpio_setup_accessors()
465 gc->write_reg = bgpio_write64; in bgpio_setup_accessors()
470 dev_err(dev, "unsupported data width %u bits\n", gc->bgpio_bits); in bgpio_setup_accessors()
471 return -EINVAL; in bgpio_setup_accessors()
478 * Create the device and allocate the resources. For setting GPIO's there are
481 * - single input/output register resource (named "dat").
482 * - set/clear pair (named "set" and "clr").
483 * - single output register resource and single input resource ("set" and
491 * For setting the GPIO direction, there are three supported configurations:
493 * - simple bidirection GPIO that requires no configuration.
494 * - an output direction register (named "dirout") where a 1 bit
495 * indicates the GPIO is an output.
496 * - an input direction register (named "dirin") where a 1 bit indicates
497 * the GPIO is an input.
506 gc->reg_dat = dat; in bgpio_setup_io()
507 if (!gc->reg_dat) in bgpio_setup_io()
508 return -EINVAL; in bgpio_setup_io()
511 gc->reg_set = set; in bgpio_setup_io()
512 gc->reg_clr = clr; in bgpio_setup_io()
513 gc->set = bgpio_set_with_clear; in bgpio_setup_io()
514 gc->set_multiple = bgpio_set_multiple_with_clear; in bgpio_setup_io()
516 gc->reg_set = set; in bgpio_setup_io()
517 gc->set = bgpio_set_set; in bgpio_setup_io()
518 gc->set_multiple = bgpio_set_multiple_set; in bgpio_setup_io()
520 gc->set = bgpio_set_none; in bgpio_setup_io()
521 gc->set_multiple = NULL; in bgpio_setup_io()
523 gc->set = bgpio_set; in bgpio_setup_io()
524 gc->set_multiple = bgpio_set_multiple; in bgpio_setup_io()
529 gc->get = bgpio_get_set; in bgpio_setup_io()
530 if (!gc->be_bits) in bgpio_setup_io()
531 gc->get_multiple = bgpio_get_set_multiple; in bgpio_setup_io()
533 * We deliberately avoid assigning the ->get_multiple() call in bgpio_setup_io()
536 * simply too much complexity, let the GPIO core fall back to in bgpio_setup_io()
540 gc->get = bgpio_get; in bgpio_setup_io()
541 if (gc->be_bits) in bgpio_setup_io()
542 gc->get_multiple = bgpio_get_multiple_be; in bgpio_setup_io()
544 gc->get_multiple = bgpio_get_multiple; in bgpio_setup_io()
556 gc->reg_dir_out = dirout; in bgpio_setup_direction()
557 gc->reg_dir_in = dirin; in bgpio_setup_direction()
559 gc->direction_output = bgpio_dir_out_dir_first; in bgpio_setup_direction()
561 gc->direction_output = bgpio_dir_out_val_first; in bgpio_setup_direction()
562 gc->direction_input = bgpio_dir_in; in bgpio_setup_direction()
563 gc->get_direction = bgpio_get_dir; in bgpio_setup_direction()
566 gc->direction_output = bgpio_dir_out_err; in bgpio_setup_direction()
568 gc->direction_output = bgpio_simple_dir_out; in bgpio_setup_direction()
569 gc->direction_input = bgpio_simple_dir_in; in bgpio_setup_direction()
577 if (gpio_pin >= chip->ngpio) in bgpio_request()
578 return -EINVAL; in bgpio_request()
580 if (chip->bgpio_pinctrl) in bgpio_request()
587 * bgpio_init() - Initialize generic GPIO accessor functions
588 * @gc: the GPIO chip to set up
589 * @dev: the parent device of the new GPIO chip (compulsory)
591 * @dat: MMIO address for the register to READ the value of the GPIO lines, it
594 * @set: MMIO address for the register to SET the value of the GPIO lines, it is
595 * expected that we write the line with 1 in this register to drive the GPIO line
597 * @clr: MMIO address for the register to CLEAR the value of the GPIO lines, it is
598 * expected that we write the line with 1 in this register to drive the GPIO line
600 * will be assumed to also clear the GPIO lines, by actively writing the line
621 return -EINVAL; in bgpio_init()
623 gc->bgpio_bits = sz * 8; in bgpio_init()
624 if (gc->bgpio_bits > BITS_PER_LONG) in bgpio_init()
625 return -EINVAL; in bgpio_init()
627 raw_spin_lock_init(&gc->bgpio_lock); in bgpio_init()
628 gc->parent = dev; in bgpio_init()
629 gc->label = dev_name(dev); in bgpio_init()
630 gc->base = -1; in bgpio_init()
631 gc->request = bgpio_request; in bgpio_init()
632 gc->be_bits = !!(flags & BGPIOF_BIG_ENDIAN); in bgpio_init()
636 gc->ngpio = gc->bgpio_bits; in bgpio_init()
651 gc->bgpio_pinctrl = true; in bgpio_init()
653 gc->free = gpiochip_generic_free; in bgpio_init()
656 gc->bgpio_data = gc->read_reg(gc->reg_dat); in bgpio_init()
657 if (gc->set == bgpio_set_set && in bgpio_init()
659 gc->bgpio_data = gc->read_reg(gc->reg_set); in bgpio_init()
662 gc->bgpio_dir_unreadable = true; in bgpio_init()
667 if ((gc->reg_dir_out || gc->reg_dir_in) && in bgpio_init()
669 if (gc->reg_dir_out) in bgpio_init()
670 gc->bgpio_dir = gc->read_reg(gc->reg_dir_out); in bgpio_init()
671 else if (gc->reg_dir_in) in bgpio_init()
672 gc->bgpio_dir = ~gc->read_reg(gc->reg_dir_in); in bgpio_init()
679 if (gc->reg_dir_out && gc->reg_dir_in) in bgpio_init()
680 gc->write_reg(gc->reg_dir_in, ~gc->bgpio_dir); in bgpio_init()
702 return IOMEM_ERR_PTR(-EINVAL); in bgpio_map()
704 return devm_ioremap_resource(&pdev->dev, r); in bgpio_map()
708 { .compatible = "brcm,bcm6345-gpio" },
709 { .compatible = "wd,mbl-gpio" },
710 { .compatible = "ni,169445-nand-gpio" },
724 return ERR_PTR(-ENOMEM); in bgpio_parse_fw()
726 pdata->base = -1; in bgpio_parse_fw()
731 if (device_property_read_bool(dev, "no-output")) in bgpio_parse_fw()
739 struct device *dev = &pdev->dev; in bgpio_pdev_probe()
758 flags = pdev->id_entry->driver_data; in bgpio_pdev_probe()
763 return -EINVAL; in bgpio_pdev_probe()
787 gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL); in bgpio_pdev_probe()
789 return -ENOMEM; in bgpio_pdev_probe()
796 if (pdata->label) in bgpio_pdev_probe()
797 gc->label = pdata->label; in bgpio_pdev_probe()
798 gc->base = pdata->base; in bgpio_pdev_probe()
799 if (pdata->ngpio > 0) in bgpio_pdev_probe()
800 gc->ngpio = pdata->ngpio; in bgpio_pdev_probe()
805 return devm_gpiochip_add_data(&pdev->dev, gc, NULL); in bgpio_pdev_probe()
810 .name = "basic-mmio-gpio",
813 .name = "basic-mmio-gpio-be",
822 .name = "basic-mmio-gpio",
833 MODULE_DESCRIPTION("Driver for basic memory-mapped GPIO controllers");