1 // SPDX-License-Identifier: GPL-2.0
5  * Copyright (c) 2012 Dmitry Eremin-Solenikov
80 	agp->orig[offset] = ioread8(agp->pm + AMD_REG_GPIO(offset)) &  in amd_gpio_request()
83 	dev_dbg(&agp->pdev->dev, "Requested gpio %d, data %x\n", offset, agp->orig[offset]);  in amd_gpio_request()
92 	dev_dbg(&agp->pdev->dev, "Freed gpio %d, data %x\n", offset, agp->orig[offset]);  in amd_gpio_free()
94 	iowrite8(agp->orig[offset], agp->pm + AMD_REG_GPIO(offset));  in amd_gpio_free()
103 	spin_lock_irqsave(&agp->lock, flags);  in amd_gpio_set()
104 	temp = ioread8(agp->pm + AMD_REG_GPIO(offset));  in amd_gpio_set()
106 	iowrite8(temp, agp->pm + AMD_REG_GPIO(offset));  in amd_gpio_set()
107 	spin_unlock_irqrestore(&agp->lock, flags);  in amd_gpio_set()
109 	dev_dbg(&agp->pdev->dev, "Setting gpio %d, value %d, reg=%02x\n", offset, !!value, temp);  in amd_gpio_set()
119 	temp = ioread8(agp->pm + AMD_REG_GPIO(offset));  in amd_gpio_get()
121 	dev_dbg(&agp->pdev->dev, "Getting gpio %d, reg=%02x\n", offset, temp);  in amd_gpio_get()
132 	spin_lock_irqsave(&agp->lock, flags);  in amd_gpio_dirout()
133 	temp = ioread8(agp->pm + AMD_REG_GPIO(offset));  in amd_gpio_dirout()
135 	iowrite8(temp, agp->pm + AMD_REG_GPIO(offset));  in amd_gpio_dirout()
136 	spin_unlock_irqrestore(&agp->lock, flags);  in amd_gpio_dirout()
138 	dev_dbg(&agp->pdev->dev, "Dirout gpio %d, value %d, reg=%02x\n", offset, !!value, temp);  in amd_gpio_dirout()
149 	spin_lock_irqsave(&agp->lock, flags);  in amd_gpio_dirin()
150 	temp = ioread8(agp->pm + AMD_REG_GPIO(offset));  in amd_gpio_dirin()
152 	iowrite8(temp, agp->pm + AMD_REG_GPIO(offset));  in amd_gpio_dirin()
153 	spin_unlock_irqrestore(&agp->lock, flags);  in amd_gpio_dirin()
155 	dev_dbg(&agp->pdev->dev, "Dirin gpio %d, reg=%02x\n", offset, temp);  in amd_gpio_dirin()
160 static struct amd_gpio gp = {  variable
164 		.base		= -1,
177 	int err = -ENODEV;  in amd_gpio_init()
181 	/* We look for our device - AMD South Bridge  in amd_gpio_init()
199 	err = pci_read_config_dword(pdev, 0x58, &gp.pmbase);  in amd_gpio_init()
204 	err = -EIO;  in amd_gpio_init()
205 	gp.pmbase &= 0x0000FF00;  in amd_gpio_init()
206 	if (gp.pmbase == 0)  in amd_gpio_init()
208 	if (!devm_request_region(&pdev->dev, gp.pmbase + PMBASE_OFFSET,  in amd_gpio_init()
210 		dev_err(&pdev->dev, "AMD GPIO region 0x%x already in use!\n",  in amd_gpio_init()
211 			gp.pmbase + PMBASE_OFFSET);  in amd_gpio_init()
212 		err = -EBUSY;  in amd_gpio_init()
215 	gp.pm = ioport_map(gp.pmbase + PMBASE_OFFSET, PMBASE_SIZE);  in amd_gpio_init()
216 	if (!gp.pm) {  in amd_gpio_init()
217 		dev_err(&pdev->dev, "Couldn't map io port into io memory\n");  in amd_gpio_init()
218 		err = -ENOMEM;  in amd_gpio_init()
221 	gp.pdev = pdev;  in amd_gpio_init()
222 	gp.chip.parent = &pdev->dev;  in amd_gpio_init()
224 	spin_lock_init(&gp.lock);  in amd_gpio_init()
226 	dev_info(&pdev->dev, "AMD-8111 GPIO detected\n");  in amd_gpio_init()
227 	err = gpiochip_add_data(&gp.chip, &gp);  in amd_gpio_init()
229 		dev_err(&pdev->dev, "GPIO registering failed (%d)\n", err);  in amd_gpio_init()
230 		ioport_unmap(gp.pm);  in amd_gpio_init()
242 	gpiochip_remove(&gp.chip);  in amd_gpio_exit()
243 	ioport_unmap(gp.pm);  in amd_gpio_exit()
244 	pci_dev_put(gp.pdev);  in amd_gpio_exit()