36 	 * Scoped Latency and Bandwidth Information Structure in Coherent Device  in cdat_normalize()
605  * Transient context for containing the current calculation of bandwidth when
614  * cxl_endpoint_gather_bandwidth - collect all the endpoint bandwidth in an xarray
615  * @cxlr: CXL region for the bandwidth calculation
617  * @usp_xa: (output) the xarray that collects all the bandwidth coordinates
623  * Collects aggregated endpoint bandwidth and store the bandwidth in
625  * device. Each endpoint consists the minimum of the bandwidth from DSLBIS
626  * from the endpoint CDAT, the endpoint upstream link bandwidth, and the
627  * bandwidth from the SSLBIS of the switch CDAT for the switch upstream port to
686 	/* Direct upstream link from EP bandwidth */  in cxl_endpoint_gather_bandwidth()
692 	 * Min of upstream link bandwidth and Endpoint CDAT bandwidth from  in cxl_endpoint_gather_bandwidth()
704 		 * associated with the endpoint bandwidth.  in cxl_endpoint_gather_bandwidth()
712 		 * bandwidth  in cxl_endpoint_gather_bandwidth()
718 	 * Aggregate the computed bandwidth with the current aggregated bandwidth  in cxl_endpoint_gather_bandwidth()
742  * cxl_switch_gather_bandwidth - collect all the bandwidth at switch level in an xarray  in DEFINE_FREE()
752  * bandwidth, the upstream link bandwidth, and the SSLBIS of the upstream  in DEFINE_FREE()
753  * switch if exists. Sum the resulting bandwidth under the switch upstream  in DEFINE_FREE()
820 		/* Retrieve the upstream link bandwidth */  in DEFINE_FREE()
826 		 * Take the min of downstream bandwidth and the upstream link  in DEFINE_FREE()
827 		 * bandwidth.  in DEFINE_FREE()
833 		 * switch SSLBIS bandwidth if there's a parent switch  in DEFINE_FREE()
839 		 * Aggregate the calculated bandwidth common to an upstream  in DEFINE_FREE()
849 				"Asymmetric hierarchy detected, bandwidth not updated\n");  in DEFINE_FREE()
859  * cxl_rp_gather_bandwidth - handle the root port level bandwidth collection
860  * @xa: the xarray that holds the cxl_perf_ctx that has the bandwidth calculated
903  * cxl_hb_gather_bandwidth - handle the host bridge level bandwidth collection
904  * @xa: the xarray that holds the cxl_perf_ctx that has the bandwidth calculated
953  * cxl_region_update_bandwidth - Update the bandwidth access coordinates of a region
955  * @input_xa: xarray holds cxl_perf_ctx wht calculated bandwidth per ACPI0017 instance
975  * cxl_region_shared_upstream_bandwidth_update - Recalculate the bandwidth for
979  * The function walks the topology from bottom up and calculates the bandwidth. It
1000 	/* Collect bandwidth data from all the endpoints. */  in cxl_region_shared_upstream_bandwidth_update()
1014 			"Asymmetric hierarchy detected, bandwidth not updated\n");  in cxl_region_shared_upstream_bandwidth_update()
1019 	 * Walk up one or more switches to deal with the bandwidth of the  in cxl_region_shared_upstream_bandwidth_update()
1034 	/* Handle the bandwidth at the root port of the hierarchy */  in cxl_region_shared_upstream_bandwidth_update()
1041 	/* Handle the bandwidth at the host bridge of the hierarchy */  in cxl_region_shared_upstream_bandwidth_update()
1049 	 * Aggregate all the bandwidth collected per CFMWS (ACPI0017) and  in cxl_region_shared_upstream_bandwidth_update()
1050 	 * update the region bandwidth with the final calculated values.  in cxl_region_shared_upstream_bandwidth_update()
1067 		/* Get total bandwidth and the worst latency for the cxl region */  in cxl_region_perf_data_calculate()