drivers/crypto/talitos.h

1 /* SPDX-License-Identifier: BSD-3-Clause */
5  * Copyright (c) 2006-2011 Freescale Semiconductor, Inc.
20 			__be16 len;     /* length */  member
39 	struct talitos_ptr ptr[7];      /* ptr/len pair array */
43 #define TALITOS_DESC_SIZE	(sizeof(struct talitos_desc) - sizeof(__be32))
46  * talitos_edesc - s/w-extended descriptor
74  * talitos_request - descriptor submission request
88 /* per-channel fifo management */
92 	/* request fifo */
93 	struct talitos_request *fifo;  member
95 	/* number of requests pending in channel h/w fifo */
105 	/* index to next in-progress/done descriptor request */
136 	 * length of the request fifo
144 	/* next channel to be assigned next incoming descriptor */
174 		return priv->features & TALITOS_FTR_SEC1;  in has_ftr_sec1()
180  * TALITOS_xxx_LO addresses point to the low data bits (32-63) of the register
188 #define   TALITOS_MCR_RCA0		(1 << 15) /* remap channel 0 */
189 #define   TALITOS_MCR_RCA1		(1 << 14) /* remap channel 1 */
190 #define   TALITOS_MCR_RCA2		(1 << 13) /* remap channel 2 */
191 #define   TALITOS_MCR_RCA3		(1 << 12) /* remap channel 3 */
196 /* enable channel IRQs */
199 /* enable channel IRQs */
223 /* channel register address stride */
224 #define TALITOS_CH_BASE_OFFSET		0x1000	/* default channel map base */
228 /* channel configuration register  */
230 #define   TALITOS2_CCCR_CONT		0x2    /* channel continue on SEC2 */
231 #define   TALITOS2_CCCR_RESET		0x1    /* channel reset on SEC2 */
238 #define   TALITOS_CCCR_LO_CDIE		0x2    /* channel done IRQ enable */
239 #define   TALITOS1_CCCR_LO_RESET	0x1    /* channel reset on SEC1 */
241 /* CCPSR: channel pointer status register */
247 #define   TALITOS_CCPSR_LO_SGDLZ	0x1000 /* s/g data len zero error */
257 /* channel fetch fifo register */
309 #define TALITOS_EU_FIFO			0x800 /* output FIFO */
310 #define TALITOS_EU_FIFO_LO		0x804 /* output FIFO */
317 #define   TALITOS_RNGUSR_LO_OFL		0xff0000/* output FIFO length */