Lines Matching +full:stm32f7 +full:- +full:crc
1 // SPDX-License-Identifier: GPL-2.0-only
22 #define DRIVER_NAME "stm32-crc32"
76 mctx->key = 0; in stm32_crc32_cra_init()
77 mctx->poly = CRC32_POLY_LE; in stm32_crc32_cra_init()
85 mctx->key = CRC32C_INIT_DEFAULT; in stm32_crc32c_cra_init()
86 mctx->poly = CRC32C_POLY_LE; in stm32_crc32c_cra_init()
96 return -EINVAL; in stm32_crc_setkey()
98 mctx->key = get_unaligned_le32(key); in stm32_crc_setkey()
104 struct stm32_crc *crc; in stm32_crc_get_next_crc() local
107 crc = list_first_entry_or_null(&crc_list.dev_list, struct stm32_crc, list); in stm32_crc_get_next_crc()
108 if (crc) in stm32_crc_get_next_crc()
109 list_move_tail(&crc->list, &crc_list.dev_list); in stm32_crc_get_next_crc()
112 return crc; in stm32_crc_get_next_crc()
118 struct stm32_crc_ctx *mctx = crypto_shash_ctx(desc->tfm); in stm32_crc_init()
119 struct stm32_crc *crc; in stm32_crc_init() local
122 crc = stm32_crc_get_next_crc(); in stm32_crc_init()
123 if (!crc) in stm32_crc_init()
124 return -ENODEV; in stm32_crc_init()
126 pm_runtime_get_sync(crc->dev); in stm32_crc_init()
128 spin_lock_irqsave(&crc->lock, flags); in stm32_crc_init()
131 writel_relaxed(bitrev32(mctx->key), crc->regs + CRC_INIT); in stm32_crc_init()
132 writel_relaxed(bitrev32(mctx->poly), crc->regs + CRC_POL); in stm32_crc_init()
134 crc->regs + CRC_CR); in stm32_crc_init()
137 ctx->partial = readl_relaxed(crc->regs + CRC_DR); in stm32_crc_init()
139 spin_unlock_irqrestore(&crc->lock, flags); in stm32_crc_init()
141 pm_runtime_mark_last_busy(crc->dev); in stm32_crc_init()
142 pm_runtime_put_autosuspend(crc->dev); in stm32_crc_init()
151 struct stm32_crc_ctx *mctx = crypto_shash_ctx(desc->tfm); in burst_update()
152 struct stm32_crc *crc; in burst_update() local
154 crc = stm32_crc_get_next_crc(); in burst_update()
155 if (!crc) in burst_update()
156 return -ENODEV; in burst_update()
158 pm_runtime_get_sync(crc->dev); in burst_update()
160 if (!spin_trylock(&crc->lock)) { in burst_update()
162 if (mctx->poly == CRC32_POLY_LE) in burst_update()
163 ctx->partial = crc32_le(ctx->partial, d8, length); in burst_update()
165 ctx->partial = crc32c(ctx->partial, d8, length); in burst_update()
171 * Restore previously calculated CRC for this context as init value in burst_update()
176 writel_relaxed(bitrev32(ctx->partial), crc->regs + CRC_INIT); in burst_update()
177 writel_relaxed(bitrev32(mctx->poly), crc->regs + CRC_POL); in burst_update()
179 crc->regs + CRC_CR); in burst_update()
184 crc->regs + CRC_CR); in burst_update()
186 writeb_relaxed(*d8++, crc->regs + CRC_DR); in burst_update()
187 length--; in burst_update()
191 crc->regs + CRC_CR); in burst_update()
194 for (; length >= sizeof(u32); d8 += sizeof(u32), length -= sizeof(u32)) in burst_update()
195 writel_relaxed(*((u32 *)d8), crc->regs + CRC_DR); in burst_update()
200 crc->regs + CRC_CR); in burst_update()
201 while (length--) in burst_update()
202 writeb_relaxed(*d8++, crc->regs + CRC_DR); in burst_update()
206 ctx->partial = readl_relaxed(crc->regs + CRC_DR); in burst_update()
208 spin_unlock(&crc->lock); in burst_update()
211 pm_runtime_mark_last_busy(crc->dev); in burst_update()
212 pm_runtime_put_autosuspend(crc->dev); in burst_update()
230 size = min_t(size_t, length, burst_sz + (size_t)d8 - in stm32_crc_update()
233 rem_sz -= size, cur += size, size = min(rem_sz, burst_sz)) { in stm32_crc_update()
245 struct stm32_crc_ctx *mctx = crypto_shash_ctx(desc->tfm); in stm32_crc_final()
247 /* Send computed CRC */ in stm32_crc_final()
248 put_unaligned_le32(mctx->poly == CRC32C_POLY_LE ? in stm32_crc_final()
249 ~ctx->partial : ctx->partial, out); in stm32_crc_final()
270 /* CRC-32 */
282 .cra_driver_name = "stm32-crc32-crc32",
291 /* CRC-32Castagnoli */
303 .cra_driver_name = "stm32-crc32-crc32c",
316 struct device *dev = &pdev->dev; in stm32_crc_probe()
317 struct stm32_crc *crc; in stm32_crc_probe() local
320 crc = devm_kzalloc(dev, sizeof(*crc), GFP_KERNEL); in stm32_crc_probe()
321 if (!crc) in stm32_crc_probe()
322 return -ENOMEM; in stm32_crc_probe()
324 crc->dev = dev; in stm32_crc_probe()
326 crc->regs = devm_platform_ioremap_resource(pdev, 0); in stm32_crc_probe()
327 if (IS_ERR(crc->regs)) { in stm32_crc_probe()
328 dev_err(dev, "Cannot map CRC IO\n"); in stm32_crc_probe()
329 return PTR_ERR(crc->regs); in stm32_crc_probe()
332 crc->clk = devm_clk_get(dev, NULL); in stm32_crc_probe()
333 if (IS_ERR(crc->clk)) { in stm32_crc_probe()
335 return PTR_ERR(crc->clk); in stm32_crc_probe()
338 ret = clk_prepare_enable(crc->clk); in stm32_crc_probe()
340 dev_err(crc->dev, "Failed to enable clock\n"); in stm32_crc_probe()
352 spin_lock_init(&crc->lock); in stm32_crc_probe()
354 platform_set_drvdata(pdev, crc); in stm32_crc_probe()
357 list_add(&crc->list, &crc_list.dev_list); in stm32_crc_probe()
366 clk_disable_unprepare(crc->clk); in stm32_crc_probe()
382 struct stm32_crc *crc = platform_get_drvdata(pdev); in stm32_crc_remove() local
383 int ret = pm_runtime_get_sync(crc->dev); in stm32_crc_remove()
386 list_del(&crc->list); in stm32_crc_remove()
390 if (!--refcnt) in stm32_crc_remove()
394 pm_runtime_disable(crc->dev); in stm32_crc_remove()
395 pm_runtime_put_noidle(crc->dev); in stm32_crc_remove()
398 clk_disable(crc->clk); in stm32_crc_remove()
399 clk_unprepare(crc->clk); in stm32_crc_remove()
404 struct stm32_crc *crc = dev_get_drvdata(dev); in stm32_crc_suspend() local
411 clk_unprepare(crc->clk); in stm32_crc_suspend()
418 struct stm32_crc *crc = dev_get_drvdata(dev); in stm32_crc_resume() local
421 ret = clk_prepare(crc->clk); in stm32_crc_resume()
423 dev_err(crc->dev, "Failed to prepare clock\n"); in stm32_crc_resume()
432 struct stm32_crc *crc = dev_get_drvdata(dev); in stm32_crc_runtime_suspend() local
434 clk_disable(crc->clk); in stm32_crc_runtime_suspend()
441 struct stm32_crc *crc = dev_get_drvdata(dev); in stm32_crc_runtime_resume() local
444 ret = clk_enable(crc->clk); in stm32_crc_runtime_resume()
446 dev_err(crc->dev, "Failed to enable clock\n"); in stm32_crc_runtime_resume()
461 { .compatible = "st,stm32f7-crc", },