1 // SPDX-License-Identifier: GPL-2.0
3  * Copyright (C) 2019 - 2021
12 #include <linux/dma-mapping.h>
21 #include "eip93-main.h"
22 #include "eip93-regs.h"
23 #include "eip93-common.h"
24 #include "eip93-cipher.h"
25 #include "eip93-aes.h"
26 #include "eip93-des.h"
27 #include "eip93-aead.h"
28 #include "eip93-hash.h"
67 	__raw_writel(mask, eip93->base + EIP93_REG_MASK_DISABLE);  in eip93_irq_disable()
72 	__raw_writel(mask, eip93->base + EIP93_REG_MASK_ENABLE);  in eip93_irq_enable()
77 	__raw_writel(mask, eip93->base + EIP93_REG_INT_CLR);  in eip93_irq_clear()
85 		switch (eip93_algs[j]->type) {  in eip93_unregister_algs()
87 			crypto_unregister_skcipher(&eip93_algs[j]->alg.skcipher);  in eip93_unregister_algs()
90 			crypto_unregister_aead(&eip93_algs[j]->alg.aead);  in eip93_unregister_algs()
93 			crypto_unregister_ahash(&eip93_algs[i]->alg.ahash);  in eip93_unregister_algs()
105 		u32 alg_flags = eip93_algs[i]->flags;  in eip93_register_algs()
107 		eip93_algs[i]->eip93 = eip93;  in eip93_register_algs()
119 					eip93_algs[i]->alg.skcipher.max_keysize =  in eip93_register_algs()
123 					eip93_algs[i]->alg.skcipher.max_keysize =  in eip93_register_algs()
127 					eip93_algs[i]->alg.skcipher.max_keysize =  in eip93_register_algs()
131 					eip93_algs[i]->alg.skcipher.max_keysize +=  in eip93_register_algs()
152 		switch (eip93_algs[i]->type) {  in eip93_register_algs()
154 			ret = crypto_register_skcipher(&eip93_algs[i]->alg.skcipher);  in eip93_register_algs()
157 			ret = crypto_register_aead(&eip93_algs[i]->alg.aead);  in eip93_register_algs()
160 			ret = crypto_register_ahash(&eip93_algs[i]->alg.ahash);  in eip93_register_algs()
188 	left = readl(eip93->base + EIP93_REG_PE_RD_COUNT) & EIP93_PE_RD_COUNT;  in eip93_handle_result_descriptor()
199 		scoped_guard(spinlock_irqsave, &eip93->ring->read_lock)  in eip93_handle_result_descriptor()
202 			dev_err(eip93->dev, "Ndesc: %d nreq: %d\n",  in eip93_handle_result_descriptor()
204 			err = -EIO;  in eip93_handle_result_descriptor()
209 			pe_ctrl_stat = READ_ONCE(rdesc->pe_ctrl_stat_word);  in eip93_handle_result_descriptor()
210 			pe_length = READ_ONCE(rdesc->pe_length_word);  in eip93_handle_result_descriptor()
216 		err = rdesc->pe_ctrl_stat_word & (EIP93_PE_CTRL_PE_EXT_ERR_CODE |  in eip93_handle_result_descriptor()
222 		desc_flags = FIELD_GET(EIP93_PE_USER_ID_DESC_FLAGS, rdesc->user_id);  in eip93_handle_result_descriptor()
223 		crypto_idr = FIELD_GET(EIP93_PE_USER_ID_CRYPTO_IDR, rdesc->user_id);  in eip93_handle_result_descriptor()
225 		writel(1, eip93->base + EIP93_REG_PE_RD_COUNT);  in eip93_handle_result_descriptor()
229 		left--;  in eip93_handle_result_descriptor()
241 	scoped_guard(spinlock_bh, &eip93->ring->idr_lock) {  in eip93_handle_result_descriptor()
242 		async = idr_find(&eip93->ring->crypto_async_idr, crypto_idr);  in eip93_handle_result_descriptor()
243 		idr_remove(&eip93->ring->crypto_async_idr, crypto_idr);  in eip93_handle_result_descriptor()
273 	irq_status = readl(eip93->base + EIP93_REG_INT_MASK_STAT);  in eip93_irq_handler()
276 		tasklet_schedule(&eip93->ring->done_task);  in eip93_irq_handler()
297 	writel(val, eip93->base + EIP93_REG_PE_CONFIG);  in eip93_initialize()
303 	val = readl(eip93->base + EIP93_REG_PE_CONFIG);  in eip93_initialize()
305 	writel(val, eip93->base + EIP93_REG_PE_CONFIG);  in eip93_initialize()
317 	writel(val, eip93->base + EIP93_REG_PE_CLOCK_CTRL);  in eip93_initialize()
322 	writel(val, eip93->base + EIP93_REG_PE_BUF_THRESH);  in eip93_initialize()
329 	val = FIELD_PREP(EIPR93_PE_CDR_THRESH, EIP93_RING_NUM - EIP93_RING_BUSY);  in eip93_initialize()
335 	writel(val, eip93->base + EIP93_REG_PE_RING_THRESH);  in eip93_initialize()
340 	writel(0, eip93->base + EIP93_REG_PE_RING_CONFIG);  in eip93_desc_free()
341 	writel(0, eip93->base + EIP93_REG_PE_CDR_BASE);  in eip93_desc_free()
342 	writel(0, eip93->base + EIP93_REG_PE_RDR_BASE);  in eip93_desc_free()
347 	ring->offset = sizeof(struct eip93_descriptor);  in eip93_set_ring()
348 	ring->base = dmam_alloc_coherent(eip93->dev,  in eip93_set_ring()
350 					 &ring->base_dma, GFP_KERNEL);  in eip93_set_ring()
351 	if (!ring->base)  in eip93_set_ring()
352 		return -ENOMEM;  in eip93_set_ring()
354 	ring->write = ring->base;  in eip93_set_ring()
355 	ring->base_end = ring->base + sizeof(struct eip93_descriptor) * (EIP93_RING_NUM - 1);  in eip93_set_ring()
356 	ring->read  = ring->base;  in eip93_set_ring()
363 	struct eip93_desc_ring *cdr = &eip93->ring->cdr;  in eip93_desc_init()
364 	struct eip93_desc_ring *rdr = &eip93->ring->rdr;  in eip93_desc_init()
376 	writel((u32 __force)cdr->base_dma, eip93->base + EIP93_REG_PE_CDR_BASE);  in eip93_desc_init()
377 	writel((u32 __force)rdr->base_dma, eip93->base + EIP93_REG_PE_RDR_BASE);  in eip93_desc_init()
379 	val = FIELD_PREP(EIP93_PE_RING_SIZE, EIP93_RING_NUM - 1);  in eip93_desc_init()
380 	writel(val, eip93->base + EIP93_REG_PE_RING_CONFIG);  in eip93_desc_init()
387 	tasklet_kill(&eip93->ring->done_task);  in eip93_cleanup()
393 	writel(0, eip93->base + EIP93_REG_PE_CLOCK_CTRL);  in eip93_cleanup()
397 	idr_destroy(&eip93->ring->crypto_async_idr);  in eip93_cleanup()
402 	struct device *dev = &pdev->dev;  in eip93_crypto_probe()
409 		return -ENOMEM;  in eip93_crypto_probe()
411 	eip93->dev = dev;  in eip93_crypto_probe()
414 	eip93->base = devm_platform_ioremap_resource(pdev, 0);  in eip93_crypto_probe()
415 	if (IS_ERR(eip93->base))  in eip93_crypto_probe()
416 		return PTR_ERR(eip93->base);  in eip93_crypto_probe()
418 	eip93->irq = platform_get_irq(pdev, 0);  in eip93_crypto_probe()
419 	if (eip93->irq < 0)  in eip93_crypto_probe()
420 		return eip93->irq;  in eip93_crypto_probe()
422 	ret = devm_request_threaded_irq(eip93->dev, eip93->irq, eip93_irq_handler,  in eip93_crypto_probe()
424 					dev_name(eip93->dev), eip93);  in eip93_crypto_probe()
426 	eip93->ring = devm_kcalloc(eip93->dev, 1, sizeof(*eip93->ring), GFP_KERNEL);  in eip93_crypto_probe()
427 	if (!eip93->ring)  in eip93_crypto_probe()
428 		return -ENOMEM;  in eip93_crypto_probe()
435 	tasklet_init(&eip93->ring->done_task, eip93_done_task, (unsigned long)eip93);  in eip93_crypto_probe()
437 	spin_lock_init(&eip93->ring->read_lock);  in eip93_crypto_probe()
438 	spin_lock_init(&eip93->ring->write_lock);  in eip93_crypto_probe()
440 	spin_lock_init(&eip93->ring->idr_lock);  in eip93_crypto_probe()
441 	idr_init(&eip93->ring->crypto_async_idr);  in eip93_crypto_probe()
443 	algo_flags = readl(eip93->base + EIP93_REG_PE_OPTION_1);  in eip93_crypto_probe()
456 	ver = readl(eip93->base + EIP93_REG_PE_REVISION);  in eip93_crypto_probe()
458 	dev_info(eip93->dev, "EIP%lu:%lx:%lx:%lx,PE(0x%x:0x%x)\n",  in eip93_crypto_probe()
464 		 readl(eip93->base + EIP93_REG_PE_OPTION_0));  in eip93_crypto_probe()
478 	{ .compatible = "inside-secure,safexcel-eip93i", },
479 	{ .compatible = "inside-secure,safexcel-eip93ie", },
480 	{ .compatible = "inside-secure,safexcel-eip93is", },
481 	{ .compatible = "inside-secure,safexcel-eip93ies", },
482 	/* IW not supported currently, missing AES-XCB-MAC/AES-CCM */
483 	/* { .compatible = "inside-secure,safexcel-eip93iw", }, */
492 		.name = "inside-secure-eip93",
500 MODULE_DESCRIPTION("Mediatek EIP-93 crypto engine driver");