1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk-provider.h>
17 #include <linux/soc/qcom/smd-rpm.h>
19 #include <dt-bindings/clock/qcom,rpmcc.h>
194 		.key = cpu_to_le32(r->rpm_key),  in clk_smd_rpm_handoff()
196 		.value = cpu_to_le32(r->branch ? 1 : INT_MAX),  in clk_smd_rpm_handoff()
200 				 r->rpm_res_type, r->rpm_clk_id, &req,  in clk_smd_rpm_handoff()
205 				 r->rpm_res_type, r->rpm_clk_id, &req,  in clk_smd_rpm_handoff()
217 		.key = cpu_to_le32(r->rpm_key),  in clk_smd_rpm_set_rate_active()
223 				  r->rpm_res_type, r->rpm_clk_id, &req,  in clk_smd_rpm_set_rate_active()
231 		.key = cpu_to_le32(r->rpm_key),  in clk_smd_rpm_set_rate_sleep()
237 				  r->rpm_res_type, r->rpm_clk_id, &req,  in clk_smd_rpm_set_rate_sleep()
247 	 * Active-only clocks don't care what the rate is during sleep. So,  in to_active_sleep()
250 	if (r->active_only)  in to_active_sleep()
259 	struct clk_smd_rpm *peer = r->peer;  in clk_smd_rpm_prepare()
268 	if (!r->rate)  in clk_smd_rpm_prepare()
271 	to_active_sleep(r, r->rate, &this_rate, &this_sleep_rate);  in clk_smd_rpm_prepare()
274 	if (peer->enabled)  in clk_smd_rpm_prepare()
275 		to_active_sleep(peer, peer->rate,  in clk_smd_rpm_prepare()
280 	if (r->branch)  in clk_smd_rpm_prepare()
288 	if (r->branch)  in clk_smd_rpm_prepare()
298 		r->enabled = true;  in clk_smd_rpm_prepare()
308 	struct clk_smd_rpm *peer = r->peer;  in clk_smd_rpm_unprepare()
315 	if (!r->rate)  in clk_smd_rpm_unprepare()
319 	if (peer->enabled)  in clk_smd_rpm_unprepare()
320 		to_active_sleep(peer, peer->rate, &peer_rate,  in clk_smd_rpm_unprepare()
323 	active_rate = r->branch ? !!peer_rate : peer_rate;  in clk_smd_rpm_unprepare()
328 	sleep_rate = r->branch ? !!peer_sleep_rate : peer_sleep_rate;  in clk_smd_rpm_unprepare()
333 	r->enabled = false;  in clk_smd_rpm_unprepare()
340 	struct clk_smd_rpm *peer = r->peer;  in clk_smd_rpm_set_rate()
348 	if (!r->enabled)  in clk_smd_rpm_set_rate()
354 	if (peer->enabled)  in clk_smd_rpm_set_rate()
355 		to_active_sleep(peer, peer->rate,  in clk_smd_rpm_set_rate()
368 	r->rate = rate;  in clk_smd_rpm_set_rate()
394 	return r->rate;  in clk_smd_rpm_recalc_rate()
454 DEFINE_CLK_SMD_RPM_BUS(snoc, 1);
460 DEFINE_CLK_SMD_RPM_BUS(snoc, 2);
1293 	{ .compatible = "qcom,rpmcc-mdm9607", .data = &rpm_clk_mdm9607 },
1294 	{ .compatible = "qcom,rpmcc-msm8226", .data = &rpm_clk_msm8974 },
1295 	{ .compatible = "qcom,rpmcc-msm8909", .data = &rpm_clk_msm8909 },
1296 	{ .compatible = "qcom,rpmcc-msm8916", .data = &rpm_clk_msm8916 },
1297 	{ .compatible = "qcom,rpmcc-msm8917", .data = &rpm_clk_msm8917 },
1298 	{ .compatible = "qcom,rpmcc-msm8936", .data = &rpm_clk_msm8936 },
1299 	{ .compatible = "qcom,rpmcc-msm8937", .data = &rpm_clk_msm8937 },
1300 	{ .compatible = "qcom,rpmcc-msm8940", .data = &rpm_clk_msm8940 },
1301 	{ .compatible = "qcom,rpmcc-msm8953", .data = &rpm_clk_msm8953 },
1302 	{ .compatible = "qcom,rpmcc-msm8974", .data = &rpm_clk_msm8974 },
1303 	{ .compatible = "qcom,rpmcc-msm8976", .data = &rpm_clk_msm8976 },
1304 	{ .compatible = "qcom,rpmcc-msm8992", .data = &rpm_clk_msm8992 },
1305 	{ .compatible = "qcom,rpmcc-msm8994", .data = &rpm_clk_msm8994 },
1306 	{ .compatible = "qcom,rpmcc-msm8996", .data = &rpm_clk_msm8996 },
1307 	{ .compatible = "qcom,rpmcc-msm8998", .data = &rpm_clk_msm8998 },
1308 	{ .compatible = "qcom,rpmcc-qcm2290", .data = &rpm_clk_qcm2290 },
1309 	{ .compatible = "qcom,rpmcc-qcs404",  .data = &rpm_clk_qcs404  },
1310 	{ .compatible = "qcom,rpmcc-sdm429",  .data = &rpm_clk_sdm429  },
1311 	{ .compatible = "qcom,rpmcc-sdm660",  .data = &rpm_clk_sdm660  },
1312 	{ .compatible = "qcom,rpmcc-sm6115",  .data = &rpm_clk_sm6115  },
1313 	{ .compatible = "qcom,rpmcc-sm6125",  .data = &rpm_clk_sm6125  },
1314 	{ .compatible = "qcom,rpmcc-sm6375",  .data = &rpm_clk_sm6375  },
1323 	unsigned int idx = clkspec->args[0];  in qcom_smdrpm_clk_hw_get()
1325 	if (idx >= desc->num_clks) {  in qcom_smdrpm_clk_hw_get()
1327 		return ERR_PTR(-EINVAL);  in qcom_smdrpm_clk_hw_get()
1330 	return desc->clks[idx] ? &desc->clks[idx]->hw : ERR_PTR(-ENOENT);  in qcom_smdrpm_clk_hw_get()
1348 	rpmcc_smd_rpm = dev_get_drvdata(pdev->dev.parent);  in rpm_smd_clk_probe()
1350 		dev_err(&pdev->dev, "Unable to retrieve handle to RPM\n");  in rpm_smd_clk_probe()
1351 		return -ENODEV;  in rpm_smd_clk_probe()
1354 	desc = of_device_get_match_data(&pdev->dev);  in rpm_smd_clk_probe()
1356 		return -EINVAL;  in rpm_smd_clk_probe()
1358 	rpm_smd_clks = desc->clks;  in rpm_smd_clk_probe()
1359 	num_clks = desc->num_clks;  in rpm_smd_clk_probe()
1361 	if (desc->scaling_before_handover) {  in rpm_smd_clk_probe()
1376 	for (i = 0; i < desc->num_icc_clks; i++) {  in rpm_smd_clk_probe()
1377 		if (!desc->icc_clks[i])  in rpm_smd_clk_probe()
1380 		ret = clk_smd_rpm_handoff(desc->icc_clks[i]);  in rpm_smd_clk_probe()
1385 	if (!desc->scaling_before_handover) {  in rpm_smd_clk_probe()
1395 		ret = devm_clk_hw_register(&pdev->dev, &rpm_smd_clks[i]->hw);  in rpm_smd_clk_probe()
1400 	ret = devm_of_clk_add_hw_provider(&pdev->dev, qcom_smdrpm_clk_hw_get,  in rpm_smd_clk_probe()
1405 	icc_pdev = platform_device_register_data(pdev->dev.parent,  in rpm_smd_clk_probe()
1406 						 "icc_smd_rpm", -1, NULL, 0);  in rpm_smd_clk_probe()
1408 		dev_err(&pdev->dev, "Failed to register icc_smd_rpm device: %pE\n",  in rpm_smd_clk_probe()
1412 		ret = devm_add_action_or_reset(&pdev->dev, rpm_smd_unregister_icc,  in rpm_smd_clk_probe()
1420 	dev_err(&pdev->dev, "Error registering SMD clock driver (%d)\n", ret);  in rpm_smd_clk_probe()
1426 		.name = "qcom-clk-smd-rpm",
1446 MODULE_ALIAS("platform:qcom-clk-smd-rpm");