Lines Matching +full:gcc +full:- +full:sm8450

1 # SPDX-License-Identifier: GPL-2.0-only
206 	  CMN PLL consumes the AHB/SYS clocks from GCC and supplies
207 	  the output clocks to the networking hardware and GCC blocks.
946 	tristate "SM8450 Camera Clock Controller"
950 	  Support for the camera clock controller on SM8450 or SM8475 devices.
1040 	tristate "SM8450 Display Clock Controller"
1045 	  SM8450 or SM8475 devices.
1152 	tristate "SM8450 Global Clock Controller"
1156 	  Support for the global clock controller on SM8450 or SM8475
1261 	tristate "SM8450 Graphics Clock Controller"
1265 	  Support for the graphics clock controller on SM8450 or SM8475
1294 	  Say Y if you want to toggle LPASS-adjacent resets within
1393 	tristate "High-Frequency PLL (HFPLL) Clock Controller"
1395 	  Support for the high-frequency PLLs present on Qualcomm devices.
1402 	  Support for the Krait ACC and GCC clock controllers. Say Y
1422 	tristate "SM8450 Video Clock Controller"
1428 	  SM8450 or SM8475 devices.