Lines Matching +full:gcc +full:- +full:sm8250

1 # SPDX-License-Identifier: GPL-2.0-only
206 	  CMN PLL consumes the AHB/SYS clocks from GCC and supplies
207 	  the output clocks to the networking hardware and GCC blocks.
938 	tristate "SM8250 Camera Clock Controller"
942 	  Support for the camera clock controller on SM8250 devices.
1010 	tristate "SM8150/SM8250/SM8350 Display Clock Controller"
1015 	  SM8150/SM8250/SM8350 devices.
1134 	tristate "SM8250 Global Clock Controller"
1138 	  Support for the global clock controller on SM8250 devices.
1243 	tristate "SM8250 Graphics Clock Controller"
1247 	  Support for the graphics clock controller on SM8250 devices.
1294 	  Say Y if you want to toggle LPASS-adjacent resets within
1353 	tristate "SM8250 Video Clock Controller"
1358 	  Support for the video clock controller on SM8250 devices.
1393 	tristate "High-Frequency PLL (HFPLL) Clock Controller"
1395 	  Support for the high-frequency PLLs present on Qualcomm devices.
1402 	  Support for the Krait ACC and GCC clock controllers. Say Y
1415 	tristate "SM8250 GFM LPASS Clocks"
1419           subsystem (LPASS) clocks found on SM8250 SoCs.