Lines Matching +full:gcc +full:- +full:sm6125

1 # SPDX-License-Identifier: GPL-2.0-only
206 	  CMN PLL consumes the AHB/SYS clocks from GCC and supplies
207 	  the output clocks to the networking hardware and GCC blocks.
990 	tristate "SM6125 Display Clock Controller"
995 	  SM6125 devices.
1089 	tristate "SM6125 Global Clock Controller"
1093 	  Support for the global clock controller on SM6125 devices.
1207 	tristate "SM6125 Graphics Clock Controller"
1211 	  Support for the graphics clock controller on SM6125 devices.
1294 	  Say Y if you want to toggle LPASS-adjacent resets within
1393 	tristate "High-Frequency PLL (HFPLL) Clock Controller"
1395 	  Support for the high-frequency PLLs present on Qualcomm devices.
1402 	  Support for the Krait ACC and GCC clock controllers. Say Y