accel/qaic/qaic.h

1 /* SPDX-License-Identifier: GPL-2.0-only
3  * Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
4  * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
25 #define QAIC_NO_PARTITION	-1
31 #define to_drm(qddev) (&(qddev)->drm)
32 #define to_accel_kdev(qddev) (to_drm(qddev)->accel->kdev) /* Return Linux device of accel node */
33 #define to_qaic_device(dev) (to_qaic_drm_device((dev))->qdev)
68 	/* ID of this DMA bridge channel(DBC) */
90 	 * this requests that belong to same memory handle have same request ID
130 	/* List of requests queued in MHI control device */
207 	/* Number of slice that have been transferred by DMA engine */
218 	/* Wait on this for completion of DMA transfer of this BO */
221 	 * Node in linked list where head is dbc->xfer_list.
222 	 * This link list contain BO's that are queued for DMA transfer.
226 	 * Node in linked list where head is dbc->bo_lists.
238 		 * Latest timestamp(ns) at which kernel enqueued requests of
239 		 * this BO for execution in DMA queue
244 		 * interrupt for requests of this BO
248 		 * Number of elements already enqueued in DMA queue before
249 		 * enqueuing requests of this BO
260 	/* Number of requests required to queue in DMA queue */
264 	/* Actual requests that will be copied in DMA queue */
267 	/* true: No DMA transfer required */