Lines Matching +full:is +full:- +full:decoded +full:- +full:cs
1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include <asm/processor-flags.h>
7 #include <asm/msr-index.h>
14 * controller to pulse the CPU reset line, which is more thorough, but
15 * doesn't work with at least one type of 486 motherboard. It is easy
18 * This code is called with the restart type (0 = BIOS, 1 = APM) in
26 /* Switch to trampoline GDT as it is guaranteed < 4 GiB */
52 * mode. The GDT is not used in real mode; it is just needed here to
58 * Load the data segment registers with 16-bit compatible values
70 * This is 16-bit protected mode code to disable paging and the cache,
74 * followed immediately by a far jump instruction, which set CS to a
76 * running instructions that have already been decoded in protected
80 * (protected-mode enable) and TS (task switch for coprocessor state
83 * is more like the state of a 486 after reset. I don't know if
87 * occurred; hopefully real BIOSs don't assume much. This is not the
88 * actual BIOS entry point, anyway (that is at 0xfffffff0).
90 * Most of this work is probably excessive, but it is what is tested.
105 testl $0x60000000, %edx /* If no cache bits -> no wbinvd */
133 .word 0xffff /* Length - real mode default value */
134 .long 0 /* Base - real mode default value */
139 /* Self-pointer */
140 .word 0xffff /* Length - real mode default value */
145 * 16-bit code segment pointing to real_mode_seg
153 * 16-bit data segment with the selector value 16 = 0x10 and
154 * base value 0x100; since this is consistent with real mode