Lines Matching +full:ecx +full:- +full:2000

1 /* SPDX-License-Identifier: GPL-2.0 */
3 * linux/arch/x86/kernel/head_64.S -- start in 32bit and switch to 64bit
5 * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
7 * Copyright (C) 2000 Karsten Keil <kkeil@suse.de>
21 #include <asm/processor-flags.h>
25 #include <asm/nospec-branch.h>
33 * because we need identity-mapped pages.
67 * the per-CPU areas are set up.
69 movl $MSR_GS_BASE, %ecx
89 * be done now, since this also includes setup of the SEV-SNP CPUID table,
101 * Derive the kernel's physical-to-virtual offset from the physical and
124 * For SEV guests: Verify that the C-bit is correct. A malicious
125 * hypervisor could lie about the C-bit position to perform a ROP
167 * SEV-ES guests. In those guests the call to verify_cpu() would cause
171 * All non SEV-ES systems, especially Intel systems, need to execute
183 addq $(init_top_pgt - __START_KERNEL_map), %rax
223 andl %edx, %ecx
226 btsl $X86_CR4_PSE_BIT, %ecx
230 * Set CR4.PGE to re-enable global translations.
232 btsl $X86_CR4_PGE_BIT, %ecx
242 * Bit 0-23 CPU# if STARTUP_xx flags are not set
244 movl smpboot_control(%rip), %ecx
245 testl $STARTUP_READ_APICID, %ecx
249 * in bit 0-23. This is also the boot CPU case (CPU number 0).
251 andl $(~STARTUP_PARALLEL_MASK), %ecx
256 mov $MSR_IA32_APICBASE, %ecx
277 /* Read the APIC ID from the fix-mapped MMIO space. */
285 mov $APIC_X2APIC_ID_MSR, %ecx
290 xorl %ecx, %ecx
296 inc %ecx
298 cmpl $NR_CPUS, %ecx
300 cmpl nr_cpu_ids(%rip), %ecx
313 /* Get the per cpu offset for the given CPU# which is in ECX */
316 xorl %edx, %edx /* zero-extended to clear all of RDX */
320 * Setup a boot time stack - Any secondary CPU will have lost its stack
321 * by now because the cr3-switch above unmaps the real-mode stack.
323 * RDX contains the per-cpu offset
345 movw $(GDT_SIZE-1), (%rsp)
370 movl $MSR_GS_BASE,%ecx
384 movl $MSR_EFER, %ecx
503 .fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc
518 /* The vector number is currently in the pt_regs->di slot. */
519 pushq %rsi /* pt_regs->si */
521 movq %rdi, 8(%rsp) /* pt_regs->di = RDI */
522 pushq %rdx /* pt_regs->dx */
523 pushq %rcx /* pt_regs->cx */
524 pushq %rax /* pt_regs->ax */
525 pushq %r8 /* pt_regs->r8 */
526 pushq %r9 /* pt_regs->r9 */
527 pushq %r10 /* pt_regs->r10 */
528 pushq %r11 /* pt_regs->r11 */
529 pushq %rbx /* pt_regs->bx */
530 pushq %rbp /* pt_regs->bp */
531 pushq %r12 /* pt_regs->r12 */
532 pushq %r13 /* pt_regs->r13 */
533 pushq %r14 /* pt_regs->r14 */
534 pushq %r15 /* pt_regs->r15 */
548 * paravirtualized INTERRUPT_RETURN and pv-ops don't work that early.
573 /* Pure iret required here - don't use INTERRUPT_RETURN */
590 /* This ensures they are 8k-aligned: */
604 .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
618 .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
620 .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
622 /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */
623 .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
628 .quad level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
652 .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
658 /* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */
659 .quad level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
660 .quad level2_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
681 .fill (512 - 4 - FIXMAP_PMD_NUM),8,0
684 .quad level1_fixmap_pgt + (pgtno << PAGE_SHIFT) - __START_KERNEL_map \
708 #include "../xen/xen-head.S"