105 				      struct clp_rsp_query_pci_grp *response)  in clp_store_query_pci_fngrp()  argument
107 	zdev->tlb_refresh = response->refresh;  in clp_store_query_pci_fngrp()
108 	zdev->dma_mask = response->dasm;  in clp_store_query_pci_fngrp()
109 	zdev->msi_addr = response->msia;  in clp_store_query_pci_fngrp()
110 	zdev->max_msi = response->noi;  in clp_store_query_pci_fngrp()
111 	zdev->fmb_update = response->mui;  in clp_store_query_pci_fngrp()
112 	zdev->version = response->version;  in clp_store_query_pci_fngrp()
113 	zdev->maxstbl = response->maxstbl;  in clp_store_query_pci_fngrp()
114 	zdev->dtsm = response->dtsm;  in clp_store_query_pci_fngrp()
115 	zdev->rtr_avail = response->rtr;  in clp_store_query_pci_fngrp()
117 	switch (response->version) {  in clp_store_query_pci_fngrp()
139 	rrb->response.hdr.len = sizeof(rrb->response);  in clp_query_pci_fngrp()
143 	if (!rc && rrb->response.hdr.rsp == CLP_RC_OK)  in clp_query_pci_fngrp()
144 		clp_store_query_pci_fngrp(zdev, &rrb->response);  in clp_query_pci_fngrp()
147 		zpci_err_clp(rrb->response.hdr.rsp, rc);  in clp_query_pci_fngrp()
155 				  struct clp_rsp_query_pci *response)  in clp_store_query_pci_fn()  argument
160 		zdev->bars[i].val = le32_to_cpu(response->bar[i]);  in clp_store_query_pci_fn()
161 		zdev->bars[i].size = response->bar_size[i];  in clp_store_query_pci_fn()
163 	zdev->start_dma = response->sdma;  in clp_store_query_pci_fn()
164 	zdev->end_dma = response->edma;  in clp_store_query_pci_fn()
165 	zdev->pchid = response->pchid;  in clp_store_query_pci_fn()
166 	zdev->pfgid = response->pfgid;  in clp_store_query_pci_fn()
167 	zdev->pft = response->pft;  in clp_store_query_pci_fn()
168 	zdev->vfn = response->vfn;  in clp_store_query_pci_fn()
169 	zdev->port = response->port;  in clp_store_query_pci_fn()
170 	zdev->fidparm = response->fidparm;  in clp_store_query_pci_fn()
171 	zdev->uid = response->uid;  in clp_store_query_pci_fn()
172 	zdev->fmb_length = sizeof(u32) * response->fmb_len;  in clp_store_query_pci_fn()
173 	zdev->is_physfn = response->is_physfn;  in clp_store_query_pci_fn()
174 	zdev->rid_available = response->rid_avail;  in clp_store_query_pci_fn()
176 		zdev->rid = response->rid;  in clp_store_query_pci_fn()
177 	zdev->tid_avail = response->tid_avail;  in clp_store_query_pci_fn()
179 		zdev->tid = response->tid;  in clp_store_query_pci_fn()
181 	memcpy(zdev->pfip, response->pfip, sizeof(zdev->pfip));  in clp_store_query_pci_fn()
182 	if (response->util_str_avail) {  in clp_store_query_pci_fn()
183 		memcpy(zdev->util_str, response->util_str,  in clp_store_query_pci_fn()
187 	zdev->mio_capable = response->mio_addr_avail;  in clp_store_query_pci_fn()
189 		if (!(response->mio.valid & (1 << (PCI_STD_NUM_BARS - i - 1))))  in clp_store_query_pci_fn()
192 		zdev->bars[i].mio_wb = (void __iomem *) response->mio.addr[i].wb;  in clp_store_query_pci_fn()
193 		zdev->bars[i].mio_wt = (void __iomem *) response->mio.addr[i].wt;  in clp_store_query_pci_fn()
210 	rrb->response.hdr.len = sizeof(rrb->response);  in clp_query_pci_fn()
214 	if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {  in clp_query_pci_fn()
215 		rc = clp_store_query_pci_fn(zdev, &rrb->response);  in clp_query_pci_fn()
218 		rc = clp_query_pci_fngrp(zdev, rrb->response.pfgid);  in clp_query_pci_fn()
221 		zpci_err_clp(rrb->response.hdr.rsp, rc);  in clp_query_pci_fn()
257 		rrb->response.hdr.len = sizeof(rrb->response);  in clp_set_pci_fn()
264 		if (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY) {  in clp_set_pci_fn()
270 	} while (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY);  in clp_set_pci_fn()
272 	if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {  in clp_set_pci_fn()
273 		*fh = rrb->response.fh;  in clp_set_pci_fn()
276 		zpci_err_clp(rrb->response.hdr.rsp, rc);  in clp_set_pci_fn()
278 			rc = rrb->response.hdr.rsp;  in clp_set_pci_fn()
297 	rrb->response.hdr.len = sizeof(rrb->response);  in clp_setup_writeback_mio()
300 	if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {  in clp_setup_writeback_mio()
301 		if (rrb->response.vwb) {  in clp_setup_writeback_mio()
302 			wb_bit_pos = rrb->response.mio_wb;  in clp_setup_writeback_mio()
311 		zpci_err_clp(rrb->response.hdr.rsp, rc);  in clp_setup_writeback_mio()
355 	rrb->response.hdr.len = CLP_BLK_SIZE - LIST_PCI_HDR_LEN;  in clp_list_pci_req()
360 	if (rc || rrb->response.hdr.rsp != CLP_RC_OK) {  in clp_list_pci_req()
362 		zpci_err_clp(rrb->response.hdr.rsp, rc);  in clp_list_pci_req()
366 	update_uid_checking(rrb->response.uid_checking);  in clp_list_pci_req()
367 	WARN_ON_ONCE(rrb->response.entry_size !=  in clp_list_pci_req()
370 	*nentries = (rrb->response.hdr.len - LIST_PCI_HDR_LEN) /  in clp_list_pci_req()
371 		rrb->response.entry_size;  in clp_list_pci_req()
372 	*resume_token = rrb->response.resume_token;  in clp_list_pci_req()
388 			cb(&rrb->response.fh_list[i], data);  in clp_list_pci()
405 		fh_list = rrb->response.fh_list;  in clp_find_pci()
499 	    lpcb->response.hdr.len > limit)  in clp_base_slpc()
519 	    lpcb->response.hdr.len > limit)  in clp_pci_slpc()
529 	    lpcb->response.hdr.len > limit)  in clp_pci_list()
542 	    lpcb->response.hdr.len > limit)  in clp_pci_query()
555 	    lpcb->response.hdr.len > limit)  in clp_pci_query_grp()