Lines Matching +full:1 +full:v2

139 static __always_inline void fpu_vab(u8 v1, u8 v2, u8 v3)  in fpu_vab()  argument
141 asm volatile("VAB %[v1],%[v2],%[v3]" in fpu_vab()
143 : [v1] "I" (v1), [v2] "I" (v2), [v3] "I" (v3) in fpu_vab()
147 static __always_inline void fpu_vcksm(u8 v1, u8 v2, u8 v3) in fpu_vcksm() argument
149 asm volatile("VCKSM %[v1],%[v2],%[v3]" in fpu_vcksm()
151 : [v1] "I" (v1), [v2] "I" (v2), [v3] "I" (v3) in fpu_vcksm()
155 static __always_inline void fpu_vesravb(u8 v1, u8 v2, u8 v3) in fpu_vesravb() argument
157 asm volatile("VESRAVB %[v1],%[v2],%[v3]" in fpu_vesravb()
159 : [v1] "I" (v1), [v2] "I" (v2), [v3] "I" (v3) in fpu_vesravb()
163 static __always_inline void fpu_vgfmag(u8 v1, u8 v2, u8 v3, u8 v4) in fpu_vgfmag() argument
165 asm volatile("VGFMAG %[v1],%[v2],%[v3],%[v4]" in fpu_vgfmag()
167 : [v1] "I" (v1), [v2] "I" (v2), [v3] "I" (v3), [v4] "I" (v4) in fpu_vgfmag()
171 static __always_inline void fpu_vgfmg(u8 v1, u8 v2, u8 v3) in fpu_vgfmg() argument
173 asm volatile("VGFMG %[v1],%[v2],%[v3]" in fpu_vgfmg()
175 : [v1] "I" (v1), [v2] "I" (v2), [v3] "I" (v3) in fpu_vgfmg()
197 " la 1,%[vxr]\n" in fpu_vl()
198 " VL %[v1],0,,1\n" in fpu_vl()
202 : "memory", "1"); in fpu_vl()
240 size = min(index + 1, sizeof(__vector128)); in fpu_vll()
256 size = min(index + 1, sizeof(__vector128)); in fpu_vll()
259 " la 1,%[vxr]\n" in fpu_vll()
260 " VLL %[v1],%[index],0,1\n" in fpu_vll()
265 : "memory", "1"); in fpu_vll()
274 unsigned int size = ((_v3) - (_v1) + 1) * sizeof(__vector128); \
276 __vector128 _v[(_v3) - (_v1) + 1]; \
285 (_v3) - (_v1) + 1; \
292 unsigned int size = ((_v3) - (_v1) + 1) * sizeof(__vector128); \
294 __vector128 _v[(_v3) - (_v1) + 1]; \
299 " la 1,%[vxrs]\n" \
300 " VLM %[v1],%[v3],0,1\n" \
304 : "memory", "1"); \
305 (_v3) - (_v1) + 1; \
310 static __always_inline void fpu_vlr(u8 v1, u8 v2) in fpu_vlr() argument
312 asm volatile("VLR %[v1],%[v2]" in fpu_vlr()
314 : [v1] "I" (v1), [v2] "I" (v2) in fpu_vlr()
326 static __always_inline void fpu_vn(u8 v1, u8 v2, u8 v3) in fpu_vn() argument
328 asm volatile("VN %[v1],%[v2],%[v3]" in fpu_vn()
330 : [v1] "I" (v1), [v2] "I" (v2), [v3] "I" (v3) in fpu_vn()
334 static __always_inline void fpu_vperm(u8 v1, u8 v2, u8 v3, u8 v4) in fpu_vperm() argument
336 asm volatile("VPERM %[v1],%[v2],%[v3],%[v4]" in fpu_vperm()
338 : [v1] "I" (v1), [v2] "I" (v2), [v3] "I" (v3), [v4] "I" (v4) in fpu_vperm()
350 static __always_inline void fpu_vsrlb(u8 v1, u8 v2, u8 v3) in fpu_vsrlb() argument
352 asm volatile("VSRLB %[v1],%[v2],%[v3]" in fpu_vsrlb()
354 : [v1] "I" (v1), [v2] "I" (v2), [v3] "I" (v3) in fpu_vsrlb()
375 " la 1,%[vxr]\n" in fpu_vst()
376 " VST %[v1],0,,1\n" in fpu_vst()
379 : "memory", "1"); in fpu_vst()
390 size = min(index + 1, sizeof(__vector128)); in fpu_vstl()
404 size = min(index + 1, sizeof(__vector128)); in fpu_vstl()
407 " la 1,%[vxr]\n" in fpu_vstl()
408 " VSTL %[v1],%[index],0,1\n" in fpu_vstl()
411 : "memory", "1"); in fpu_vstl()
420 unsigned int size = ((_v3) - (_v1) + 1) * sizeof(__vector128); \
422 __vector128 _v[(_v3) - (_v1) + 1]; \
430 (_v3) - (_v1) + 1; \
437 unsigned int size = ((_v3) - (_v1) + 1) * sizeof(__vector128); \
439 __vector128 _v[(_v3) - (_v1) + 1]; \
444 " la 1,%[vxrs]\n" \
445 " VSTM %[v1],%[v3],0,1\n" \
448 : "memory", "1"); \
449 (_v3) - (_v1) + 1; \
454 static __always_inline void fpu_vupllf(u8 v1, u8 v2) in fpu_vupllf() argument
456 asm volatile("VUPLLF %[v1],%[v2]" in fpu_vupllf()
458 : [v1] "I" (v1), [v2] "I" (v2) in fpu_vupllf()
462 static __always_inline void fpu_vx(u8 v1, u8 v2, u8 v3) in fpu_vx() argument
464 asm volatile("VX %[v1],%[v2],%[v3]" in fpu_vx()
466 : [v1] "I" (v1), [v2] "I" (v2), [v3] "I" (v3) in fpu_vx()