Lines Matching +full:cpu +full:- +full:cfg
1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/entry-kvm.h>
56 struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr; in kvm_riscv_reset_vcpu()
57 struct kvm_vcpu_csr *reset_csr = &vcpu->arch.guest_reset_csr; in kvm_riscv_reset_vcpu()
58 struct kvm_cpu_context *cntx = &vcpu->arch.guest_context; in kvm_riscv_reset_vcpu()
59 struct kvm_cpu_context *reset_cntx = &vcpu->arch.guest_reset_context; in kvm_riscv_reset_vcpu()
68 loaded = (vcpu->cpu != -1); in kvm_riscv_reset_vcpu()
72 vcpu->arch.last_exit_cpu = -1; in kvm_riscv_reset_vcpu()
76 spin_lock(&vcpu->arch.reset_cntx_lock); in kvm_riscv_reset_vcpu()
78 spin_unlock(&vcpu->arch.reset_cntx_lock); in kvm_riscv_reset_vcpu()
80 memset(&vcpu->arch.smstateen_csr, 0, sizeof(vcpu->arch.smstateen_csr)); in kvm_riscv_reset_vcpu()
90 bitmap_zero(vcpu->arch.irqs_pending, KVM_RISCV_VCPU_NR_IRQS); in kvm_riscv_reset_vcpu()
91 bitmap_zero(vcpu->arch.irqs_pending_mask, KVM_RISCV_VCPU_NR_IRQS); in kvm_riscv_reset_vcpu()
95 vcpu->arch.hfence_head = 0; in kvm_riscv_reset_vcpu()
96 vcpu->arch.hfence_tail = 0; in kvm_riscv_reset_vcpu()
97 memset(vcpu->arch.hfence_queue, 0, sizeof(vcpu->arch.hfence_queue)); in kvm_riscv_reset_vcpu()
116 struct kvm_vcpu_csr *reset_csr = &vcpu->arch.guest_reset_csr; in kvm_arch_vcpu_create()
118 spin_lock_init(&vcpu->arch.mp_state_lock); in kvm_arch_vcpu_create()
121 vcpu->arch.ran_atleast_once = false; in kvm_arch_vcpu_create()
122 vcpu->arch.mmu_page_cache.gfp_zero = __GFP_ZERO; in kvm_arch_vcpu_create()
123 bitmap_zero(vcpu->arch.isa, RISCV_ISA_EXT_MAX); in kvm_arch_vcpu_create()
129 vcpu->arch.mvendorid = sbi_get_mvendorid(); in kvm_arch_vcpu_create()
130 vcpu->arch.marchid = sbi_get_marchid(); in kvm_arch_vcpu_create()
131 vcpu->arch.mimpid = sbi_get_mimpid(); in kvm_arch_vcpu_create()
134 spin_lock_init(&vcpu->arch.hfence_lock); in kvm_arch_vcpu_create()
137 spin_lock_init(&vcpu->arch.reset_cntx_lock); in kvm_arch_vcpu_create()
139 spin_lock(&vcpu->arch.reset_cntx_lock); in kvm_arch_vcpu_create()
140 cntx = &vcpu->arch.guest_reset_context; in kvm_arch_vcpu_create()
141 cntx->sstatus = SR_SPP | SR_SPIE; in kvm_arch_vcpu_create()
142 cntx->hstatus = 0; in kvm_arch_vcpu_create()
143 cntx->hstatus |= HSTATUS_VTW; in kvm_arch_vcpu_create()
144 cntx->hstatus |= HSTATUS_SPVP; in kvm_arch_vcpu_create()
145 cntx->hstatus |= HSTATUS_SPV; in kvm_arch_vcpu_create()
146 spin_unlock(&vcpu->arch.reset_cntx_lock); in kvm_arch_vcpu_create()
149 return -ENOMEM; in kvm_arch_vcpu_create()
152 reset_csr->scounteren = 0x7; in kvm_arch_vcpu_create()
180 * vcpu with id 0 is the designated boot cpu. in kvm_arch_vcpu_postcreate()
181 * Keep all vcpus with non-zero id in power-off state so that in kvm_arch_vcpu_postcreate()
184 if (vcpu->vcpu_idx != 0) in kvm_arch_vcpu_postcreate()
198 /* Free unused pages pre-allocated for G-stage page table mappings */ in kvm_arch_vcpu_destroy()
199 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_page_cache); in kvm_arch_vcpu_destroy()
222 return (kvm_riscv_vcpu_has_interrupts(vcpu, -1UL) && in kvm_arch_vcpu_runnable()
223 !kvm_riscv_vcpu_stopped(vcpu) && !vcpu->arch.pause); in kvm_arch_vcpu_runnable()
233 return (vcpu->arch.guest_context.sstatus & SR_SPP) ? true : false; in kvm_arch_vcpu_in_kernel()
239 return vcpu->arch.guest_context.sepc; in kvm_arch_vcpu_get_ip()
251 struct kvm_vcpu *vcpu = filp->private_data; in kvm_arch_vcpu_async_ioctl()
258 return -EFAULT; in kvm_arch_vcpu_async_ioctl()
266 return -ENOIOCTLCMD; in kvm_arch_vcpu_async_ioctl()
272 struct kvm_vcpu *vcpu = filp->private_data; in kvm_arch_vcpu_ioctl()
274 long r = -EINVAL; in kvm_arch_vcpu_ioctl()
281 r = -EFAULT; in kvm_arch_vcpu_ioctl()
296 r = -EFAULT; in kvm_arch_vcpu_ioctl()
303 r = -E2BIG; in kvm_arch_vcpu_ioctl()
306 r = kvm_riscv_vcpu_copy_reg_indices(vcpu, user_list->reg); in kvm_arch_vcpu_ioctl()
319 return -EINVAL; in kvm_arch_vcpu_ioctl_get_sregs()
325 return -EINVAL; in kvm_arch_vcpu_ioctl_set_sregs()
330 return -EINVAL; in kvm_arch_vcpu_ioctl_get_fpu()
335 return -EINVAL; in kvm_arch_vcpu_ioctl_set_fpu()
341 return -EINVAL; in kvm_arch_vcpu_ioctl_translate()
346 return -EINVAL; in kvm_arch_vcpu_ioctl_get_regs()
351 return -EINVAL; in kvm_arch_vcpu_ioctl_set_regs()
356 struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr; in kvm_riscv_vcpu_flush_interrupts()
359 if (READ_ONCE(vcpu->arch.irqs_pending_mask[0])) { in kvm_riscv_vcpu_flush_interrupts()
360 mask = xchg_acquire(&vcpu->arch.irqs_pending_mask[0], 0); in kvm_riscv_vcpu_flush_interrupts()
361 val = READ_ONCE(vcpu->arch.irqs_pending[0]) & mask; in kvm_riscv_vcpu_flush_interrupts()
363 csr->hvip &= ~mask; in kvm_riscv_vcpu_flush_interrupts()
364 csr->hvip |= val; in kvm_riscv_vcpu_flush_interrupts()
374 struct kvm_vcpu_arch *v = &vcpu->arch; in kvm_riscv_vcpu_sync_interrupts()
375 struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr; in kvm_riscv_vcpu_sync_interrupts()
378 csr->vsie = ncsr_read(CSR_VSIE); in kvm_riscv_vcpu_sync_interrupts()
380 /* Sync-up HVIP.VSSIP bit changes does by Guest */ in kvm_riscv_vcpu_sync_interrupts()
382 if ((csr->hvip ^ hvip) & (1UL << IRQ_VS_SOFT)) { in kvm_riscv_vcpu_sync_interrupts()
385 v->irqs_pending_mask)) in kvm_riscv_vcpu_sync_interrupts()
386 set_bit(IRQ_VS_SOFT, v->irqs_pending); in kvm_riscv_vcpu_sync_interrupts()
389 v->irqs_pending_mask)) in kvm_riscv_vcpu_sync_interrupts()
390 clear_bit(IRQ_VS_SOFT, v->irqs_pending); in kvm_riscv_vcpu_sync_interrupts()
395 if ((csr->hvip ^ hvip) & (1UL << IRQ_PMU_OVF)) { in kvm_riscv_vcpu_sync_interrupts()
397 !test_and_set_bit(IRQ_PMU_OVF, v->irqs_pending_mask)) in kvm_riscv_vcpu_sync_interrupts()
398 clear_bit(IRQ_PMU_OVF, v->irqs_pending); in kvm_riscv_vcpu_sync_interrupts()
401 /* Sync-up AIA high interrupts */ in kvm_riscv_vcpu_sync_interrupts()
404 /* Sync-up timer CSRs */ in kvm_riscv_vcpu_sync_interrupts()
411 * We only allow VS-mode software, timer, and external in kvm_riscv_vcpu_set_interrupt()
413 * defined by RISC-V privilege specification. in kvm_riscv_vcpu_set_interrupt()
420 return -EINVAL; in kvm_riscv_vcpu_set_interrupt()
422 set_bit(irq, vcpu->arch.irqs_pending); in kvm_riscv_vcpu_set_interrupt()
424 set_bit(irq, vcpu->arch.irqs_pending_mask); in kvm_riscv_vcpu_set_interrupt()
434 * We only allow VS-mode software, timer, counter overflow and external in kvm_riscv_vcpu_unset_interrupt()
436 * defined by RISC-V privilege specification. in kvm_riscv_vcpu_unset_interrupt()
443 return -EINVAL; in kvm_riscv_vcpu_unset_interrupt()
445 clear_bit(irq, vcpu->arch.irqs_pending); in kvm_riscv_vcpu_unset_interrupt()
447 set_bit(irq, vcpu->arch.irqs_pending_mask); in kvm_riscv_vcpu_unset_interrupt()
456 ie = ((vcpu->arch.guest_csr.vsie & VSIP_VALID_MASK) in kvm_riscv_vcpu_has_interrupts()
458 ie |= vcpu->arch.guest_csr.vsie & ~IRQ_LOCAL_MASK & in kvm_riscv_vcpu_has_interrupts()
460 if (READ_ONCE(vcpu->arch.irqs_pending[0]) & ie) in kvm_riscv_vcpu_has_interrupts()
469 WRITE_ONCE(vcpu->arch.mp_state.mp_state, KVM_MP_STATE_STOPPED); in __kvm_riscv_vcpu_power_off()
476 spin_lock(&vcpu->arch.mp_state_lock); in kvm_riscv_vcpu_power_off()
478 spin_unlock(&vcpu->arch.mp_state_lock); in kvm_riscv_vcpu_power_off()
483 WRITE_ONCE(vcpu->arch.mp_state.mp_state, KVM_MP_STATE_RUNNABLE); in __kvm_riscv_vcpu_power_on()
489 spin_lock(&vcpu->arch.mp_state_lock); in kvm_riscv_vcpu_power_on()
491 spin_unlock(&vcpu->arch.mp_state_lock); in kvm_riscv_vcpu_power_on()
496 return READ_ONCE(vcpu->arch.mp_state.mp_state) == KVM_MP_STATE_STOPPED; in kvm_riscv_vcpu_stopped()
502 *mp_state = READ_ONCE(vcpu->arch.mp_state); in kvm_arch_vcpu_ioctl_get_mpstate()
512 spin_lock(&vcpu->arch.mp_state_lock); in kvm_arch_vcpu_ioctl_set_mpstate()
514 switch (mp_state->mp_state) { in kvm_arch_vcpu_ioctl_set_mpstate()
516 WRITE_ONCE(vcpu->arch.mp_state, *mp_state); in kvm_arch_vcpu_ioctl_set_mpstate()
522 ret = -EINVAL; in kvm_arch_vcpu_ioctl_set_mpstate()
525 spin_unlock(&vcpu->arch.mp_state_lock); in kvm_arch_vcpu_ioctl_set_mpstate()
533 if (dbg->control & KVM_GUESTDBG_ENABLE) { in kvm_arch_vcpu_ioctl_set_guest_debug()
534 vcpu->guest_debug = dbg->control; in kvm_arch_vcpu_ioctl_set_guest_debug()
535 vcpu->arch.cfg.hedeleg &= ~BIT(EXC_BREAKPOINT); in kvm_arch_vcpu_ioctl_set_guest_debug()
537 vcpu->guest_debug = 0; in kvm_arch_vcpu_ioctl_set_guest_debug()
538 vcpu->arch.cfg.hedeleg |= BIT(EXC_BREAKPOINT); in kvm_arch_vcpu_ioctl_set_guest_debug()
546 const unsigned long *isa = vcpu->arch.isa; in kvm_riscv_vcpu_setup_config()
547 struct kvm_vcpu_config *cfg = &vcpu->arch.cfg; in kvm_riscv_vcpu_setup_config() local
550 cfg->henvcfg |= ENVCFG_PBMTE; in kvm_riscv_vcpu_setup_config()
553 cfg->henvcfg |= ENVCFG_STCE; in kvm_riscv_vcpu_setup_config()
556 cfg->henvcfg |= (ENVCFG_CBIE | ENVCFG_CBCFE); in kvm_riscv_vcpu_setup_config()
559 cfg->henvcfg |= ENVCFG_CBZE; in kvm_riscv_vcpu_setup_config()
563 cfg->henvcfg |= ENVCFG_ADUE; in kvm_riscv_vcpu_setup_config()
566 cfg->hstateen0 |= SMSTATEEN0_HSENVCFG; in kvm_riscv_vcpu_setup_config()
568 cfg->hstateen0 |= SMSTATEEN0_AIA_IMSIC | in kvm_riscv_vcpu_setup_config()
572 cfg->hstateen0 |= SMSTATEEN0_SSTATEEN0; in kvm_riscv_vcpu_setup_config()
575 cfg->hedeleg = KVM_HEDELEG_DEFAULT; in kvm_riscv_vcpu_setup_config()
576 if (vcpu->guest_debug) in kvm_riscv_vcpu_setup_config()
577 cfg->hedeleg &= ~BIT(EXC_BREAKPOINT); in kvm_riscv_vcpu_setup_config()
580 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) in kvm_arch_vcpu_load() argument
583 struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr; in kvm_arch_vcpu_load()
584 struct kvm_vcpu_config *cfg = &vcpu->arch.cfg; in kvm_arch_vcpu_load() local
588 nacl_csr_write(nsh, CSR_VSSTATUS, csr->vsstatus); in kvm_arch_vcpu_load()
589 nacl_csr_write(nsh, CSR_VSIE, csr->vsie); in kvm_arch_vcpu_load()
590 nacl_csr_write(nsh, CSR_VSTVEC, csr->vstvec); in kvm_arch_vcpu_load()
591 nacl_csr_write(nsh, CSR_VSSCRATCH, csr->vsscratch); in kvm_arch_vcpu_load()
592 nacl_csr_write(nsh, CSR_VSEPC, csr->vsepc); in kvm_arch_vcpu_load()
593 nacl_csr_write(nsh, CSR_VSCAUSE, csr->vscause); in kvm_arch_vcpu_load()
594 nacl_csr_write(nsh, CSR_VSTVAL, csr->vstval); in kvm_arch_vcpu_load()
595 nacl_csr_write(nsh, CSR_HEDELEG, cfg->hedeleg); in kvm_arch_vcpu_load()
596 nacl_csr_write(nsh, CSR_HVIP, csr->hvip); in kvm_arch_vcpu_load()
597 nacl_csr_write(nsh, CSR_VSATP, csr->vsatp); in kvm_arch_vcpu_load()
598 nacl_csr_write(nsh, CSR_HENVCFG, cfg->henvcfg); in kvm_arch_vcpu_load()
600 nacl_csr_write(nsh, CSR_HENVCFGH, cfg->henvcfg >> 32); in kvm_arch_vcpu_load()
602 nacl_csr_write(nsh, CSR_HSTATEEN0, cfg->hstateen0); in kvm_arch_vcpu_load()
604 nacl_csr_write(nsh, CSR_HSTATEEN0H, cfg->hstateen0 >> 32); in kvm_arch_vcpu_load()
607 csr_write(CSR_VSSTATUS, csr->vsstatus); in kvm_arch_vcpu_load()
608 csr_write(CSR_VSIE, csr->vsie); in kvm_arch_vcpu_load()
609 csr_write(CSR_VSTVEC, csr->vstvec); in kvm_arch_vcpu_load()
610 csr_write(CSR_VSSCRATCH, csr->vsscratch); in kvm_arch_vcpu_load()
611 csr_write(CSR_VSEPC, csr->vsepc); in kvm_arch_vcpu_load()
612 csr_write(CSR_VSCAUSE, csr->vscause); in kvm_arch_vcpu_load()
613 csr_write(CSR_VSTVAL, csr->vstval); in kvm_arch_vcpu_load()
614 csr_write(CSR_HEDELEG, cfg->hedeleg); in kvm_arch_vcpu_load()
615 csr_write(CSR_HVIP, csr->hvip); in kvm_arch_vcpu_load()
616 csr_write(CSR_VSATP, csr->vsatp); in kvm_arch_vcpu_load()
617 csr_write(CSR_HENVCFG, cfg->henvcfg); in kvm_arch_vcpu_load()
619 csr_write(CSR_HENVCFGH, cfg->henvcfg >> 32); in kvm_arch_vcpu_load()
621 csr_write(CSR_HSTATEEN0, cfg->hstateen0); in kvm_arch_vcpu_load()
623 csr_write(CSR_HSTATEEN0H, cfg->hstateen0 >> 32); in kvm_arch_vcpu_load()
631 kvm_riscv_vcpu_host_fp_save(&vcpu->arch.host_context); in kvm_arch_vcpu_load()
632 kvm_riscv_vcpu_guest_fp_restore(&vcpu->arch.guest_context, in kvm_arch_vcpu_load()
633 vcpu->arch.isa); in kvm_arch_vcpu_load()
634 kvm_riscv_vcpu_host_vector_save(&vcpu->arch.host_context); in kvm_arch_vcpu_load()
635 kvm_riscv_vcpu_guest_vector_restore(&vcpu->arch.guest_context, in kvm_arch_vcpu_load()
636 vcpu->arch.isa); in kvm_arch_vcpu_load()
638 kvm_riscv_vcpu_aia_load(vcpu, cpu); in kvm_arch_vcpu_load()
642 vcpu->cpu = cpu; in kvm_arch_vcpu_load()
648 struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr; in kvm_arch_vcpu_put()
650 vcpu->cpu = -1; in kvm_arch_vcpu_put()
654 kvm_riscv_vcpu_guest_fp_save(&vcpu->arch.guest_context, in kvm_arch_vcpu_put()
655 vcpu->arch.isa); in kvm_arch_vcpu_put()
656 kvm_riscv_vcpu_host_fp_restore(&vcpu->arch.host_context); in kvm_arch_vcpu_put()
659 kvm_riscv_vcpu_guest_vector_save(&vcpu->arch.guest_context, in kvm_arch_vcpu_put()
660 vcpu->arch.isa); in kvm_arch_vcpu_put()
661 kvm_riscv_vcpu_host_vector_restore(&vcpu->arch.host_context); in kvm_arch_vcpu_put()
665 csr->vsstatus = nacl_csr_read(nsh, CSR_VSSTATUS); in kvm_arch_vcpu_put()
666 csr->vsie = nacl_csr_read(nsh, CSR_VSIE); in kvm_arch_vcpu_put()
667 csr->vstvec = nacl_csr_read(nsh, CSR_VSTVEC); in kvm_arch_vcpu_put()
668 csr->vsscratch = nacl_csr_read(nsh, CSR_VSSCRATCH); in kvm_arch_vcpu_put()
669 csr->vsepc = nacl_csr_read(nsh, CSR_VSEPC); in kvm_arch_vcpu_put()
670 csr->vscause = nacl_csr_read(nsh, CSR_VSCAUSE); in kvm_arch_vcpu_put()
671 csr->vstval = nacl_csr_read(nsh, CSR_VSTVAL); in kvm_arch_vcpu_put()
672 csr->hvip = nacl_csr_read(nsh, CSR_HVIP); in kvm_arch_vcpu_put()
673 csr->vsatp = nacl_csr_read(nsh, CSR_VSATP); in kvm_arch_vcpu_put()
675 csr->vsstatus = csr_read(CSR_VSSTATUS); in kvm_arch_vcpu_put()
676 csr->vsie = csr_read(CSR_VSIE); in kvm_arch_vcpu_put()
677 csr->vstvec = csr_read(CSR_VSTVEC); in kvm_arch_vcpu_put()
678 csr->vsscratch = csr_read(CSR_VSSCRATCH); in kvm_arch_vcpu_put()
679 csr->vsepc = csr_read(CSR_VSEPC); in kvm_arch_vcpu_put()
680 csr->vscause = csr_read(CSR_VSCAUSE); in kvm_arch_vcpu_put()
681 csr->vstval = csr_read(CSR_VSTVAL); in kvm_arch_vcpu_put()
682 csr->hvip = csr_read(CSR_HVIP); in kvm_arch_vcpu_put()
683 csr->vsatp = csr_read(CSR_VSATP); in kvm_arch_vcpu_put()
695 (!kvm_riscv_vcpu_stopped(vcpu)) && (!vcpu->arch.pause), in kvm_riscv_check_vcpu_requests()
699 if (kvm_riscv_vcpu_stopped(vcpu) || vcpu->arch.pause) { in kvm_riscv_check_vcpu_requests()
737 struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr; in kvm_riscv_update_hvip()
739 ncsr_write(CSR_HVIP, csr->hvip); in kvm_riscv_update_hvip()
745 struct kvm_vcpu_smstateen_csr *smcsr = &vcpu->arch.smstateen_csr; in kvm_riscv_vcpu_swap_in_guest_state()
746 struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr; in kvm_riscv_vcpu_swap_in_guest_state()
747 struct kvm_vcpu_config *cfg = &vcpu->arch.cfg; in kvm_riscv_vcpu_swap_in_guest_state() local
749 vcpu->arch.host_scounteren = csr_swap(CSR_SCOUNTEREN, csr->scounteren); in kvm_riscv_vcpu_swap_in_guest_state()
750 vcpu->arch.host_senvcfg = csr_swap(CSR_SENVCFG, csr->senvcfg); in kvm_riscv_vcpu_swap_in_guest_state()
752 (cfg->hstateen0 & SMSTATEEN0_SSTATEEN0)) in kvm_riscv_vcpu_swap_in_guest_state()
753 vcpu->arch.host_sstateen0 = csr_swap(CSR_SSTATEEN0, in kvm_riscv_vcpu_swap_in_guest_state()
754 smcsr->sstateen0); in kvm_riscv_vcpu_swap_in_guest_state()
759 struct kvm_vcpu_smstateen_csr *smcsr = &vcpu->arch.smstateen_csr; in kvm_riscv_vcpu_swap_in_host_state()
760 struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr; in kvm_riscv_vcpu_swap_in_host_state()
761 struct kvm_vcpu_config *cfg = &vcpu->arch.cfg; in kvm_riscv_vcpu_swap_in_host_state() local
763 csr->scounteren = csr_swap(CSR_SCOUNTEREN, vcpu->arch.host_scounteren); in kvm_riscv_vcpu_swap_in_host_state()
764 csr->senvcfg = csr_swap(CSR_SENVCFG, vcpu->arch.host_senvcfg); in kvm_riscv_vcpu_swap_in_host_state()
766 (cfg->hstateen0 & SMSTATEEN0_SSTATEEN0)) in kvm_riscv_vcpu_swap_in_host_state()
767 smcsr->sstateen0 = csr_swap(CSR_SSTATEEN0, in kvm_riscv_vcpu_swap_in_host_state()
768 vcpu->arch.host_sstateen0); in kvm_riscv_vcpu_swap_in_host_state()
782 struct kvm_cpu_context *gcntx = &vcpu->arch.guest_context; in kvm_riscv_vcpu_enter_exit()
783 struct kvm_cpu_context *hcntx = &vcpu->arch.host_context; in kvm_riscv_vcpu_enter_exit()
800 hcntx->hstatus = in kvm_riscv_vcpu_enter_exit()
805 gcntx->hstatus); in kvm_riscv_vcpu_enter_exit()
810 hcntx->hstatus = nacl_csr_swap(nsh, in kvm_riscv_vcpu_enter_exit()
811 CSR_HSTATUS, gcntx->hstatus); in kvm_riscv_vcpu_enter_exit()
813 hcntx->hstatus = csr_swap(CSR_HSTATUS, gcntx->hstatus); in kvm_riscv_vcpu_enter_exit()
819 &gcntx->ra, in kvm_riscv_vcpu_enter_exit()
822 __kvm_riscv_nacl_switch_to(&vcpu->arch, SBI_EXT_NACL, in kvm_riscv_vcpu_enter_exit()
829 gcntx->hstatus = nacl_scratch_read_long(nsh, in kvm_riscv_vcpu_enter_exit()
833 gcntx->hstatus = csr_swap(CSR_HSTATUS, hcntx->hstatus); in kvm_riscv_vcpu_enter_exit()
836 trap->htval = nacl_csr_read(nsh, CSR_HTVAL); in kvm_riscv_vcpu_enter_exit()
837 trap->htinst = nacl_csr_read(nsh, CSR_HTINST); in kvm_riscv_vcpu_enter_exit()
839 hcntx->hstatus = csr_swap(CSR_HSTATUS, gcntx->hstatus); in kvm_riscv_vcpu_enter_exit()
841 __kvm_riscv_switch_to(&vcpu->arch); in kvm_riscv_vcpu_enter_exit()
843 gcntx->hstatus = csr_swap(CSR_HSTATUS, hcntx->hstatus); in kvm_riscv_vcpu_enter_exit()
845 trap->htval = csr_read(CSR_HTVAL); in kvm_riscv_vcpu_enter_exit()
846 trap->htinst = csr_read(CSR_HTINST); in kvm_riscv_vcpu_enter_exit()
849 trap->sepc = gcntx->sepc; in kvm_riscv_vcpu_enter_exit()
850 trap->scause = csr_read(CSR_SCAUSE); in kvm_riscv_vcpu_enter_exit()
851 trap->stval = csr_read(CSR_STVAL); in kvm_riscv_vcpu_enter_exit()
853 vcpu->arch.last_exit_cpu = vcpu->cpu; in kvm_riscv_vcpu_enter_exit()
862 struct kvm_run *run = vcpu->run; in kvm_arch_vcpu_ioctl_run()
864 if (!vcpu->arch.ran_atleast_once) in kvm_arch_vcpu_ioctl_run()
868 vcpu->arch.ran_atleast_once = true; in kvm_arch_vcpu_ioctl_run()
872 switch (run->exit_reason) { in kvm_arch_vcpu_ioctl_run()
874 /* Process MMIO value returned from user-space */ in kvm_arch_vcpu_ioctl_run()
875 ret = kvm_riscv_vcpu_mmio_return(vcpu, vcpu->run); in kvm_arch_vcpu_ioctl_run()
878 /* Process SBI value returned from user-space */ in kvm_arch_vcpu_ioctl_run()
879 ret = kvm_riscv_vcpu_sbi_return(vcpu, vcpu->run); in kvm_arch_vcpu_ioctl_run()
882 /* Process CSR value returned from user-space */ in kvm_arch_vcpu_ioctl_run()
883 ret = kvm_riscv_vcpu_csr_return(vcpu, vcpu->run); in kvm_arch_vcpu_ioctl_run()
894 if (!vcpu->wants_to_run) { in kvm_arch_vcpu_ioctl_run()
896 return -EINTR; in kvm_arch_vcpu_ioctl_run()
904 run->exit_reason = KVM_EXIT_UNKNOWN; in kvm_arch_vcpu_ioctl_run()
931 * Documentation/virt/kvm/vcpu-requests.rst in kvm_arch_vcpu_ioctl_run()
933 vcpu->mode = IN_GUEST_MODE; in kvm_arch_vcpu_ioctl_run()
944 /* Update HVIP CSR for current CPU */ in kvm_arch_vcpu_ioctl_run()
947 if (kvm_riscv_gstage_vmid_ver_changed(&vcpu->kvm->arch.vmid) || in kvm_arch_vcpu_ioctl_run()
950 vcpu->mode = OUTSIDE_GUEST_MODE; in kvm_arch_vcpu_ioctl_run()
960 * Note: This should be done after G-stage VMID has been in kvm_arch_vcpu_ioctl_run()
971 vcpu->mode = OUTSIDE_GUEST_MODE; in kvm_arch_vcpu_ioctl_run()
972 vcpu->stat.exits++; in kvm_arch_vcpu_ioctl_run()
984 * recognised, so we just hope that the CPU takes any pending in kvm_arch_vcpu_ioctl_run()