Lines Matching +full:c900 +full:- +full:aclint +full:- +full:mswi
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/clock/sophgo,sg2042-clkgen.h>
8 #include <dt-bindings/clock/sophgo,sg2042-pll.h>
9 #include <dt-bindings/clock/sophgo,sg2042-rpgate.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/reset/sophgo,sg2042-reset.h>
13 #include "sg2042-cpus.dtsi"
17 #address-cells = <2>;
18 #size-cells = <2>;
19 dma-noncoherent;
26 compatible = "fixed-clock";
27 clock-output-names = "cgi_main";
28 #clock-cells = <0>;
32 compatible = "fixed-clock";
33 clock-output-names = "cgi_dpll0";
34 #clock-cells = <0>;
38 compatible = "fixed-clock";
39 clock-output-names = "cgi_dpll1";
40 #clock-cells = <0>;
44 compatible = "simple-bus";
45 #address-cells = <2>;
46 #size-cells = <2>;
47 interrupt-parent = <&intc>;
51 compatible = "snps,designware-i2c";
53 #address-cells = <1>;
54 #size-cells = <0>;
56 clock-names = "ref";
57 clock-frequency = <100000>;
64 compatible = "snps,designware-i2c";
66 #address-cells = <1>;
67 #size-cells = <0>;
69 clock-names = "ref";
70 clock-frequency = <100000>;
77 compatible = "snps,designware-i2c";
79 #address-cells = <1>;
80 #size-cells = <0>;
82 clock-names = "ref";
83 clock-frequency = <100000>;
90 compatible = "snps,designware-i2c";
92 #address-cells = <1>;
93 #size-cells = <0>;
95 clock-names = "ref";
96 clock-frequency = <100000>;
103 compatible = "snps,dw-apb-gpio";
105 #address-cells = <1>;
106 #size-cells = <0>;
109 clock-names = "bus", "db";
111 port0a: gpio-controller@0 {
112 compatible = "snps,dw-apb-gpio-port";
113 gpio-controller;
114 #gpio-cells = <2>;
117 interrupt-controller;
118 #interrupt-cells = <2>;
119 interrupt-parent = <&intc>;
125 compatible = "snps,dw-apb-gpio";
127 #address-cells = <1>;
128 #size-cells = <0>;
131 clock-names = "bus", "db";
133 port1a: gpio-controller@0 {
134 compatible = "snps,dw-apb-gpio-port";
135 gpio-controller;
136 #gpio-cells = <2>;
139 interrupt-controller;
140 #interrupt-cells = <2>;
141 interrupt-parent = <&intc>;
147 compatible = "snps,dw-apb-gpio";
149 #address-cells = <1>;
150 #size-cells = <0>;
153 clock-names = "bus", "db";
155 port2a: gpio-controller@0 {
156 compatible = "snps,dw-apb-gpio-port";
157 gpio-controller;
158 #gpio-cells = <2>;
161 interrupt-controller;
162 #interrupt-cells = <2>;
163 interrupt-parent = <&intc>;
169 compatible = "sophgo,sg2042-pwm";
171 #pwm-cells = <3>;
173 clock-names = "apb";
177 pllclk: clock-controller@70300100c0 {
178 compatible = "sophgo,sg2042-pll";
181 clock-names = "cgi_main", "cgi_dpll0", "cgi_dpll1";
182 #clock-cells = <1>;
185 msi: msi-controller@7030010304 {
186 compatible = "sophgo,sg2042-msi";
189 reg-names = "clr", "doorbell";
190 msi-controller;
191 #msi-cells = <0>;
192 msi-ranges = <&intc 64 IRQ_TYPE_LEVEL_HIGH 32>;
195 rpgate: clock-controller@7030010368 {
196 compatible = "sophgo,sg2042-rpgate";
199 clock-names = "rpgate";
200 #clock-cells = <1>;
203 clkgen: clock-controller@7030012000 {
204 compatible = "sophgo,sg2042-clkgen";
210 clock-names = "mpll",
214 #clock-cells = <1>;
217 clint_mswi: interrupt-controller@7094000000 {
218 compatible = "sophgo,sg2042-aclint-mswi", "thead,c900-aclint-mswi";
220 interrupts-extended = <&cpu0_intc 3>,
287 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
289 reg-names = "mtimecmp";
290 interrupts-extended = <&cpu0_intc 7>,
297 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
299 reg-names = "mtimecmp";
300 interrupts-extended = <&cpu4_intc 7>,
307 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
309 reg-names = "mtimecmp";
310 interrupts-extended = <&cpu8_intc 7>,
317 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
319 reg-names = "mtimecmp";
320 interrupts-extended = <&cpu12_intc 7>,
327 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
329 reg-names = "mtimecmp";
330 interrupts-extended = <&cpu16_intc 7>,
337 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
339 reg-names = "mtimecmp";
340 interrupts-extended = <&cpu20_intc 7>,
347 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
349 reg-names = "mtimecmp";
350 interrupts-extended = <&cpu24_intc 7>,
357 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
359 reg-names = "mtimecmp";
360 interrupts-extended = <&cpu28_intc 7>,
367 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
369 reg-names = "mtimecmp";
370 interrupts-extended = <&cpu32_intc 7>,
377 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
379 reg-names = "mtimecmp";
380 interrupts-extended = <&cpu36_intc 7>,
387 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
389 reg-names = "mtimecmp";
390 interrupts-extended = <&cpu40_intc 7>,
397 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
399 reg-names = "mtimecmp";
400 interrupts-extended = <&cpu44_intc 7>,
407 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
409 reg-names = "mtimecmp";
410 interrupts-extended = <&cpu48_intc 7>,
417 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
419 reg-names = "mtimecmp";
420 interrupts-extended = <&cpu52_intc 7>,
427 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
429 reg-names = "mtimecmp";
430 interrupts-extended = <&cpu56_intc 7>,
437 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
439 reg-names = "mtimecmp";
440 interrupts-extended = <&cpu60_intc 7>,
446 intc: interrupt-controller@7090000000 {
447 compatible = "sophgo,sg2042-plic", "thead,c900-plic";
448 #address-cells = <0>;
449 #interrupt-cells = <2>;
451 interrupt-controller;
452 interrupts-extended =
520 rstgen: reset-controller@7030013000 {
521 compatible = "sophgo,sg2042-reset";
523 #reset-cells = <1>;
527 compatible = "snps,dw-apb-uart";
530 clock-frequency = <500000000>;
533 clock-names = "baudclk", "apb_pclk";
534 reg-shift = <2>;
535 reg-io-width = <4>;
541 compatible = "sophgo,sg2042-dwcmshc";
543 interrupt-parent = <&intc>;
548 clock-names = "core",
555 compatible = "sophgo,sg2042-dwcmshc";
557 interrupt-parent = <&intc>;
562 clock-names = "core",