nohash/32/pte-8xx.h

1 /* SPDX-License-Identifier: GPL-2.0 */
8  * We also use the two level tables, but we can put the real bits in them
14  * accessed, and overload the changed bit for write protect.  We use
19  * register when the TLB entry is loaded.  We will use bit 27 for guard, since
25  * load the PMD into MD_TWC.  The 8M pages are only used for kernel
84 #include <asm/pgtable-masks.h>
138 	pte_update(vma->vm_mm, address, ptep, clr, set, huge);  in __ptep_set_access_flags()
160  * On the 8xx, the page tables are a bit special. For 16k pages, we have
161  * 4 identical entries. For 512k pages, we have 128 entries as if it was
162  * 4k pages, but they are flagged as 512k pages for the hardware.
163  * For 8M pages, we have 1024 entries as if it was 4M pages (PMD_SIZE)
164  * but they are flagged as 8M pages for the hardware.
165  * For 4k pages, we have a single entry in the table.
231 	pte_basic_t val = READ_ONCE(ptep->pte);  in ptep_get()