mips/kernel/genex.S

6  * Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle
27  * General exception vector for all other CPUs.
30  * to fit into space reserved for the exception handler.
46  * General exception handler for CPUs with virtual coherency exception.
49  * exception) bytes to fit into space reserved for the exception handler.
74 	 * c0_badvaddr because after return from this exception handler the
75 	 * load / store will be re-executed.
79 	li	k1, -4					# Is this ...
88 	sw	k1, (k0)
99 	sw	k1, (k0)
119 	 * Fall through -- see skipover_handler below -- and have the
124 	.if		1b - 0b > 32
126 	.elseif	1b - 0b > 8
130 	.equ	r4k_wait_idle_size, 2b - 0b
148 	PTR_LA	k1, r4k_wait_insn - 2
149 	ori 	k0, r4k_wait_idle_size - 2
152 	PTR_ADDIU 	k0, r4k_wait_exit - r4k_wait_insn + 2
222 	PTR_LI	t1, ~(_THREAD_SIZE-1)
248  * This is a dedicated interrupt exception vector which reduces the
253  * to fit into space reserved for the exception handler.
260  * EJTAG debug exception handler.
261  * The EJTAG debug exception entry point is 0xbfc00480, which
333 	PTR_LI	t1, ~(_THREAD_SIZE-1)
354  * EJTAG debug exception handler.
391 	sw	zero, 0(k0)
440  * NMI debug exception handler for MIPS reference boards.
441  * The NMI debug exception entry point is 0xbfc00000, which
459 	 * Clear ERL - restore segment mapping
460 	 * Clear BEV - required for page fault exception handler to work
515 	 * register. All GSExc-equipped processors have MIPS32.
524 	.macro	__BUILD_silent exception  argument
541 	.macro	__BUILD_count exception  argument
542 	LONG_L	t0,exception_count_\exception
544 	LONG_S	t0,exception_count_\exception
545 	.comm	exception_count\exception, 8, 8
548 	.macro	__BUILD_HANDLER exception handler clear verbose ext
550 	NESTED(handle_\exception, PT_SIZE, sp)
554 	FEXPORT(handle_\exception\ext)
557 	__BUILD_\verbose \exception
561 	END(handle_\exception)
564 	.macro	BUILD_HANDLER exception handler clear verbose
565 	__BUILD_HANDLER \exception \handler \clear \verbose _int