include/asm/mips-cpc.h

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 # error Please include asm/mips-cps.h rather than asm/mips-cpc.h
21  * mips_cpc_default_phys_base - retrieve the default physical base address of
24  * Returns the default physical base address of the Cluster Power Controller
26  * implemented per-platform.
31  * mips_cpc_probe - probe for a Cluster Power Controller
33  * Attempt to detect the presence of a Cluster Power Controller. Returns 0 if
34  * a CPC is successfully detected, else -errno.
41 	return -ENODEV;  in mips_cpc_probe()
46  * mips_cpc_present - determine whether a Cluster Power Controller is present
64 #define CPC_ACCESSOR_RO(sz, off, name)					\  argument
65 	CPS_ACCESSOR_RO(cpc, sz, MIPS_CPC_GCB_OFS + off, name)		\
66 	CPS_ACCESSOR_RO(cpc, sz, MIPS_CPC_COCB_OFS + off, redir_##name)
68 #define CPC_ACCESSOR_RW(sz, off, name)					\  argument
69 	CPS_ACCESSOR_RW(cpc, sz, MIPS_CPC_GCB_OFS + off, name)		\
70 	CPS_ACCESSOR_RW(cpc, sz, MIPS_CPC_COCB_OFS + off, redir_##name)
72 #define CPC_CX_ACCESSOR_RO(sz, off, name)				\  argument
73 	CPS_ACCESSOR_RO(cpc, sz, MIPS_CPC_CLCB_OFS + off, cl_##name)	\
74 	CPS_ACCESSOR_RO(cpc, sz, MIPS_CPC_COCB_OFS + off, co_##name)
76 #define CPC_CX_ACCESSOR_RW(sz, off, name)				\  argument
77 	CPS_ACCESSOR_RW(cpc, sz, MIPS_CPC_CLCB_OFS + off, cl_##name)	\
78 	CPS_ACCESSOR_RW(cpc, sz, MIPS_CPC_COCB_OFS + off, co_##name)
80 /* CPC_ACCESS - Control core/IOCU access to CPC registers prior to CM 3 */
83 /* CPC_SEQDEL - Configure delays between command sequencer steps */
86 /* CPC_RAIL - Configure the delay from rail power-up to stability */
89 /* CPC_RESETLEN - Configure the length of reset sequences */
92 /* CPC_REVISION - Indicates the revisison of the CPC */
95 /* CPC_PWRUP_CTL - Control power to the Coherence Manager (CM) */
99 /* CPC_CONFIG - Mirrors GCR_CONFIG */
102 /* CPC_SYS_CONFIG - Control cluster endianness */
108 /* CPC_Cx_CMD - Instruct the CPC to take action on a core */
116 /* CPC_Cx_STAT_CONF - Indicates core configuration & state */
135 /* CPC_Cx_OTHER - Configure the core-other register block prior to CM 3 */
139 /* CPC_Cx_VP_STOP - Stop Virtual Processors (VPs) within a core from running */
142 /* CPC_Cx_VP_START - Start Virtual Processors (VPs) within a core running */
145 /* CPC_Cx_VP_RUNNING - Indicate which Virtual Processors (VPs) are running */
148 /* CPC_Cx_CONFIG - Mirrors GCR_Cx_CONFIG */
154  * mips_cpc_lock_other - lock access to another core
165  * mips_cpc_unlock_other - unlock access to another core