dts/mobileye/eyeq6h.dtsi

1 // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
6 #include <dt-bindings/interrupt-controller/mips-gic.h>
8 #include <dt-bindings/clock/mobileye,eyeq5-clk.h>
11 	#address-cells = <2>;
12 	#size-cells = <2>;
14 		#address-cells = <1>;
15 		#size-cells = <0>;
28 	cpu_intc: interrupt-controller {
29 		compatible = "mti,cpu-interrupt-controller";
30 		interrupt-controller;
31 		#address-cells = <0>;
32 		#interrupt-cells = <1>;
35 	coherency-manager {
36 		compatible = "mobileye,eyeq6-cm";
39 	xtal: clock-30000000 {
40 		compatible = "fixed-clock";
41 		#clock-cells = <0>;
42 		clock-frequency = <30000000>;
46 		compatible = "simple-bus";
47 		#address-cells = <2>;
48 		#size-cells = <2>;
51 		olb_acc: system-controller@d2003000 {
52 			compatible = "mobileye,eyeq6h-acc-olb", "syscon";
54 			#reset-cells = <1>;
55 			#clock-cells = <1>;
57 			clock-names = "ref";
60 		olb_central: system-controller@d3100000 {
61 			compatible = "mobileye,eyeq6h-central-olb", "syscon";
63 			#clock-cells = <1>;
65 			clock-names = "ref";
71 			reg-io-width = <4>;
72 			interrupt-parent = <&gic>;
75 			clock-names = "uartclk", "apb_pclk";
79 			compatible = "pinctrl-single";
81 			#pinctrl-cells = <1>;
82 			pinctrl-single,register-width = <32>;
83 			pinctrl-single,function-mask = <0xffff>;
86 		olb_west: system-controller@d3338000 {
87 			compatible = "mobileye,eyeq6h-west-olb", "syscon";
89 			#reset-cells = <1>;
90 			#clock-cells = <1>;
92 			clock-names = "ref";
96 			compatible = "pinctrl-single";
98 			#pinctrl-cells = <1>;
99 			pinctrl-single,register-width = <32>;
100 			pinctrl-single,function-mask = <0xffff>;
103 		olb_east: system-controller@d3358000 {
104 			compatible = "mobileye,eyeq6h-east-olb", "syscon";
106 			#reset-cells = <1>;
107 			#clock-cells = <1>;
109 			clock-names = "ref";
112 		olb_south: system-controller@d8013000 {
113 			compatible = "mobileye,eyeq6h-south-olb", "syscon";
115 			#clock-cells = <1>;
117 			clock-names = "ref";
121 			compatible = "pinctrl-single";
123 			#pinctrl-cells = <1>;
124 			pinctrl-single,register-width = <32>;
125 			pinctrl-single,function-mask = <0xffff>;
128 		olb_ddr0: system-controller@e4080000 {
129 			compatible = "mobileye,eyeq6h-ddr0-olb", "syscon";
131 			#clock-cells = <1>;
133 			clock-names = "ref";
136 		olb_ddr1: system-controller@e4081000 {
137 			compatible = "mobileye,eyeq6h-ddr1-olb", "syscon";
139 			#clock-cells = <1>;
141 			clock-names = "ref";
144 		gic: interrupt-controller@f0920000 {
147 			interrupt-controller;
148 			#interrupt-cells = <3>;
151 			 * Declare the interrupt-parent even though the mti,gic
154 			 * controller & should be probed first.
156 			interrupt-parent = <&cpu_intc>;
159 				compatible = "mti,gic-timer";
167 #include "eyeq6h-pins.dtsi"