dts/xilinx/versal-net-clk.dtsi

1 // SPDX-License-Identifier: GPL-2.0
3  * dts file for Xilinx Versal NET fixed clock
6  * (C) Copyright 2022 - 2025, Advanced Micro Devices, Inc.
13 		compatible = "fixed-clock";
14 		#clock-cells = <0>;
15 		clock-frequency = <60000000>;
19 		compatible = "fixed-clock";
20 		#clock-cells = <0>;
21 		clock-frequency = <100000000>;
25 		compatible = "fixed-clock";
26 		#clock-cells = <0>;
27 		clock-frequency = <125000000>;
31 		compatible = "fixed-clock";
32 		#clock-cells = <0>;
33 		clock-frequency = <150000000>;
37 		compatible = "fixed-clock";
38 		#clock-cells = <0>;
39 		clock-frequency = <160000000>;
43 		compatible = "fixed-clock";
44 		#clock-cells = <0>;
45 		clock-frequency = <200000000>;
49 		compatible = "fixed-clock";
50 		#clock-cells = <0>;
51 		clock-frequency = <250000000>;
55 		compatible = "fixed-clock";
56 		#clock-cells = <0>;
57 		clock-frequency = <300000000>;
61 		compatible = "fixed-clock";
62 		#clock-cells = <0>;
63 		clock-frequency = <450000000>;
67 		compatible = "fixed-clock";
68 		#clock-cells = <0>;
69 		clock-frequency = <1200000000>;
73 		versal_net_firmware: versal-net-firmware {
74 			compatible = "xlnx,versal-net-firmware", "xlnx,versal-firmware";
75 			bootph-all;