dts/xilinx/versal-net-clk.dtsi

1 // SPDX-License-Identifier: GPL-2.0
6  * (C) Copyright 2022 - 2025, Advanced Micro Devices, Inc.
13 		compatible = "fixed-clock";
14 		#clock-cells = <0>;
15 		clock-frequency = <60000000>;
19 		compatible = "fixed-clock";
20 		#clock-cells = <0>;
21 		clock-frequency = <100000000>;
25 		compatible = "fixed-clock";
26 		#clock-cells = <0>;
27 		clock-frequency = <125000000>;
31 		compatible = "fixed-clock";
32 		#clock-cells = <0>;
33 		clock-frequency = <150000000>;
37 		compatible = "fixed-clock";
38 		#clock-cells = <0>;
39 		clock-frequency = <160000000>;
43 		compatible = "fixed-clock";
44 		#clock-cells = <0>;
45 		clock-frequency = <200000000>;
49 		compatible = "fixed-clock";
50 		#clock-cells = <0>;
51 		clock-frequency = <250000000>;
55 		compatible = "fixed-clock";
56 		#clock-cells = <0>;
57 		clock-frequency = <300000000>;
61 		compatible = "fixed-clock";
62 		#clock-cells = <0>;
63 		clock-frequency = <450000000>;
67 		compatible = "fixed-clock";
68 		#clock-cells = <0>;
69 		clock-frequency = <1200000000>;
72 	firmware {
73 		versal_net_firmware: versal-net-firmware {
74 			compatible = "xlnx,versal-net-firmware", "xlnx,versal-firmware";
75 			bootph-all;
82 	clocks = <&clk450>, <&clk450>;
86 	clocks = <&clk450>, <&clk450>;
90 	clocks = <&clk450>, <&clk450>;
94 	clocks = <&clk450>, <&clk450>;
98 	clocks = <&clk450>, <&clk450>;
102 	clocks = <&clk450>, <&clk450>;
106 	clocks = <&clk450>, <&clk450>;
110 	clocks = <&clk450>, <&clk450>;
114 	clocks = <&clk160>, <&clk160>;
118 	clocks = <&clk160>, <&clk160>;
122 	clocks = <&clk125>, <&clk125>, <&clk125>, <&clk125>, <&clk250>;
126 	clocks = <&clk125>, <&clk125>, <&clk125>, <&clk125>, <&clk250>;
130 	clocks = <&clk100>;
134 	clocks = <&clk100>;
138 	clocks = <&clk100>;
142 	clocks = <&clk100>;
146 	clocks = <&clk100>;
150 	clocks = <&clk100>;
154 	clocks = <&clk200>;
158 	clocks = <&clk300>, <&clk300>;
166 	clocks = <&clk200>, <&clk200>, <&clk1200>;
170 	clocks = <&clk200>, <&clk200>, <&clk1200>;
174 	clocks = <&clk100>, <&clk100>;
178 	clocks = <&clk100>, <&clk100>;
182 	clocks = <&clk200>, <&clk200>;
186 	clocks = <&clk200>, <&clk200>;
190 	clocks = <&clk150>;
194 	clocks = <&clk60>, <&clk60>;
198 	clocks = <&clk60>;
202 	clocks = <&clk60>, <&clk60>;
206 	clocks = <&clk60>;
210 	clocks = <&clk150>;
214 	clocks = <&clk150>;
218 	clocks = <&clk150>;
222 	clocks = <&clk150>;
226 	clocks = <&clk150>;
230 	clocks = <&clk150>;