Lines Matching +full:access +full:- +full:controller +full:- +full:names
1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
6 #include <dt-bindings/clock/st,stm32mp25-rcc.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/reset/st,stm32mp25-rcc.h>
9 #include <dt-bindings/regulator/st,stm32mp25-regulator.h>
10 #include <dt-bindings/phy/phy.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
17 #address-cells = <1>;
18 #size-cells = <0>;
21 compatible = "arm,cortex-a35";
24 enable-method = "psci";
25 power-domains = <&CPU_PD0>;
26 power-domain-names = "psci";
30 arm-pmu {
31 compatible = "arm,cortex-a35-pmu";
33 interrupt-affinity = <&cpu0>;
34 interrupt-parent = <&intc>;
38 compatible = "arm,smc-wdt";
39 arm,smc-id = <0xb200005a>;
45 #clock-cells = <0>;
46 compatible = "fixed-clock";
47 clock-frequency = <0>;
50 clk_rcbsec: clk-rcbsec {
51 #clock-cells = <0>;
52 compatible = "fixed-clock";
53 clock-frequency = <64000000>;
59 compatible = "linaro,optee-tz";
61 interrupt-parent = <&intc>;
66 compatible = "linaro,scmi-optee";
67 #address-cells = <1>;
68 #size-cells = <0>;
69 linaro,optee-channel-id = <0>;
73 #clock-cells = <1>;
78 #reset-cells = <1>;
85 #address-cells = <1>;
86 #size-cells = <0>;
90 regulator-name = "vddio1";
94 regulator-name = "vddio2";
98 regulator-name = "vddio3";
102 regulator-name = "vddio4";
106 regulator-name = "vdd33ucpd";
110 regulator-name = "vdda18adc";
117 intc: interrupt-controller@4ac00000 {
118 compatible = "arm,gic-400";
119 #interrupt-cells = <3>;
120 interrupt-controller;
128 compatible = "arm,psci-1.0";
131 CPU_PD0: power-domain-cpu0 {
132 #power-domain-cells = <0>;
133 power-domains = <&CLUSTER_PD>;
136 CLUSTER_PD: power-domain-cluster {
137 #power-domain-cells = <0>;
138 power-domains = <&RET_PD>;
141 RET_PD: power-domain-retention {
142 #power-domain-cells = <0>;
147 compatible = "arm,armv8-timer";
148 interrupt-parent = <&intc>;
153 always-on;
157 compatible = "simple-bus";
158 #address-cells = <1>;
159 #size-cells = <1>;
160 interrupt-parent = <&intc>;
163 hpdma: dma-controller@40400000 {
164 compatible = "st,stm32mp25-dma3";
183 #dma-cells = <3>;
186 hpdma2: dma-controller@40410000 {
187 compatible = "st,stm32mp25-dma3";
206 #dma-cells = <3>;
209 hpdma3: dma-controller@40420000 {
210 compatible = "st,stm32mp25-dma3";
229 #dma-cells = <3>;
233 compatible = "st,stm32mp25-rifsc", "simple-bus";
235 #address-cells = <1>;
236 #size-cells = <1>;
237 #access-controller-cells = <1>;
240 i2s2: audio-controller@400b0000 {
241 compatible = "st,stm32mp25-i2s";
243 #sound-dai-cells = <0>;
246 clock-names = "pclk", "i2sclk";
250 dma-names = "rx", "tx";
251 access-controllers = <&rifsc 23>;
256 #address-cells = <1>;
257 #size-cells = <0>;
258 compatible = "st,stm32mp25-spi";
265 dma-names = "rx", "tx";
266 access-controllers = <&rifsc 23>;
270 i2s3: audio-controller@400c0000 {
271 compatible = "st,stm32mp25-i2s";
273 #sound-dai-cells = <0>;
276 clock-names = "pclk", "i2sclk";
280 dma-names = "rx", "tx";
281 access-controllers = <&rifsc 24>;
286 #address-cells = <1>;
287 #size-cells = <0>;
288 compatible = "st,stm32mp25-spi";
295 dma-names = "rx", "tx";
296 access-controllers = <&rifsc 24>;
300 spdifrx: audio-controller@400d0000 {
301 compatible = "st,stm32h7-spdifrx";
302 #sound-dai-cells = <0>;
305 clock-names = "kclk";
309 dma-names = "rx", "rx-ctrl";
310 access-controllers = <&rifsc 30>;
315 compatible = "st,stm32h7-uart";
321 dma-names = "rx", "tx";
322 access-controllers = <&rifsc 32>;
327 compatible = "st,stm32h7-uart";
333 dma-names = "rx", "tx";
334 access-controllers = <&rifsc 33>;
339 compatible = "st,stm32h7-uart";
345 dma-names = "rx", "tx";
346 access-controllers = <&rifsc 34>;
351 compatible = "st,stm32h7-uart";
357 dma-names = "rx", "tx";
358 access-controllers = <&rifsc 35>;
363 compatible = "st,stm32mp25-i2c";
365 interrupt-names = "event";
369 #address-cells = <1>;
370 #size-cells = <0>;
373 dma-names = "rx", "tx";
374 access-controllers = <&rifsc 41>;
379 compatible = "st,stm32mp25-i2c";
381 interrupt-names = "event";
385 #address-cells = <1>;
386 #size-cells = <0>;
389 dma-names = "rx", "tx";
390 access-controllers = <&rifsc 42>;
395 compatible = "st,stm32mp25-i2c";
397 interrupt-names = "event";
401 #address-cells = <1>;
402 #size-cells = <0>;
405 dma-names = "rx", "tx";
406 access-controllers = <&rifsc 43>;
411 compatible = "st,stm32mp25-i2c";
413 interrupt-names = "event";
417 #address-cells = <1>;
418 #size-cells = <0>;
421 dma-names = "rx", "tx";
422 access-controllers = <&rifsc 44>;
427 compatible = "st,stm32mp25-i2c";
429 interrupt-names = "event";
433 #address-cells = <1>;
434 #size-cells = <0>;
437 dma-names = "rx", "tx";
438 access-controllers = <&rifsc 45>;
443 compatible = "st,stm32mp25-i2c";
445 interrupt-names = "event";
449 #address-cells = <1>;
450 #size-cells = <0>;
453 dma-names = "rx", "tx";
454 access-controllers = <&rifsc 46>;
459 compatible = "st,stm32mp25-i2c";
461 interrupt-names = "event";
465 #address-cells = <1>;
466 #size-cells = <0>;
469 dma-names = "rx", "tx";
470 access-controllers = <&rifsc 47>;
475 compatible = "st,stm32h7-uart";
481 dma-names = "rx", "tx";
482 access-controllers = <&rifsc 36>;
486 i2s1: audio-controller@40230000 {
487 compatible = "st,stm32mp25-i2s";
489 #sound-dai-cells = <0>;
492 clock-names = "pclk", "i2sclk";
496 dma-names = "rx", "tx";
497 access-controllers = <&rifsc 22>;
502 #address-cells = <1>;
503 #size-cells = <0>;
504 compatible = "st,stm32mp25-spi";
511 dma-names = "rx", "tx";
512 access-controllers = <&rifsc 22>;
517 #address-cells = <1>;
518 #size-cells = <0>;
519 compatible = "st,stm32mp25-spi";
526 dma-names = "rx", "tx";
527 access-controllers = <&rifsc 25>;
532 #address-cells = <1>;
533 #size-cells = <0>;
534 compatible = "st,stm32mp25-spi";
541 dma-names = "rx", "tx";
542 access-controllers = <&rifsc 26>;
547 compatible = "st,stm32mp25-sai";
550 #address-cells = <1>;
551 #size-cells = <1>;
553 clock-names = "pclk";
556 access-controllers = <&rifsc 49>;
559 sai1a: audio-controller@40290004 {
560 compatible = "st,stm32-sai-sub-a";
562 #sound-dai-cells = <0>;
564 clock-names = "sai_ck";
569 sai1b: audio-controller@40290024 {
570 compatible = "st,stm32-sai-sub-b";
572 #sound-dai-cells = <0>;
574 clock-names = "sai_ck";
581 compatible = "st,stm32mp25-sai";
584 #address-cells = <1>;
585 #size-cells = <1>;
587 clock-names = "pclk";
590 access-controllers = <&rifsc 50>;
593 sai2a: audio-controller@402a0004 {
594 compatible = "st,stm32-sai-sub-a";
596 #sound-dai-cells = <0>;
598 clock-names = "sai_ck";
603 sai2b: audio-controller@402a0024 {
604 compatible = "st,stm32-sai-sub-b";
606 #sound-dai-cells = <0>;
608 clock-names = "sai_ck";
615 compatible = "st,stm32mp25-sai";
618 #address-cells = <1>;
619 #size-cells = <1>;
621 clock-names = "pclk";
624 access-controllers = <&rifsc 51>;
627 sai3a: audio-controller@402b0004 {
628 compatible = "st,stm32-sai-sub-a";
630 #sound-dai-cells = <0>;
632 clock-names = "sai_ck";
637 sai3b: audio-controller@502b0024 {
638 compatible = "st,stm32-sai-sub-b";
640 #sound-dai-cells = <0>;
642 clock-names = "sai_ck";
649 compatible = "st,stm32h7-uart";
655 dma-names = "rx", "tx";
656 access-controllers = <&rifsc 39>;
661 compatible = "st,stm32h7-uart";
667 dma-names = "rx", "tx";
668 access-controllers = <&rifsc 31>;
673 compatible = "st,stm32mp25-sai";
676 #address-cells = <1>;
677 #size-cells = <1>;
679 clock-names = "pclk";
682 access-controllers = <&rifsc 52>;
685 sai4a: audio-controller@40340004 {
686 compatible = "st,stm32-sai-sub-a";
688 #sound-dai-cells = <0>;
690 clock-names = "sai_ck";
695 sai4b: audio-controller@40340024 {
696 compatible = "st,stm32-sai-sub-b";
698 #sound-dai-cells = <0>;
700 clock-names = "sai_ck";
707 #address-cells = <1>;
708 #size-cells = <0>;
709 compatible = "st,stm32mp25-spi";
716 dma-names = "rx", "tx";
717 access-controllers = <&rifsc 27>;
722 #address-cells = <1>;
723 #size-cells = <0>;
724 compatible = "st,stm32mp25-spi";
731 dma-names = "rx", "tx";
732 access-controllers = <&rifsc 28>;
737 compatible = "st,stm32h7-uart";
743 dma-names = "rx", "tx";
744 access-controllers = <&rifsc 37>;
749 compatible = "st,stm32h7-uart";
755 dma-names = "rx", "tx";
756 access-controllers = <&rifsc 38>;
761 compatible = "st,stm32mp25-rng";
764 clock-names = "core", "bus";
766 access-controllers = <&rifsc 92>;
771 #address-cells = <1>;
772 #size-cells = <0>;
773 compatible = "st,stm32mp25-spi";
780 dma-names = "rx", "tx";
781 access-controllers = <&rifsc 29>;
786 compatible = "st,stm32mp25-i2c";
788 interrupt-names = "event";
792 #address-cells = <1>;
793 #size-cells = <0>;
796 dma-names = "rx", "tx";
797 access-controllers = <&rifsc 48>;
802 compatible = "st,stm32mp25-csi";
808 clock-names = "pclk", "txesc", "csi2phy";
809 access-controllers = <&rifsc 86>;
814 compatible = "st,stm32mp25-dcmipp";
819 clock-names = "kclk", "mclk";
820 access-controllers = <&rifsc 87>;
825 compatible = "st,stm32mp25-combophy";
827 #phy-cells = <1>;
829 clock-names = "apb", "ker";
831 reset-names = "phy";
832 access-controllers = <&rifsc 67>;
833 power-domains = <&CLUSTER_PD>;
834 wakeup-source;
835 interrupts-extended = <&exti1 45 IRQ_TYPE_EDGE_FALLING>;
840 compatible = "st,stm32mp25-sdmmc2", "arm,pl18x", "arm,primecell";
841 arm,primecell-periphid = <0x00353180>;
845 clock-names = "apb_pclk";
847 cap-sd-highspeed;
848 cap-mmc-highspeed;
849 max-frequency = <120000000>;
850 access-controllers = <&rifsc 76>;
855 compatible = "st,stm32mp25-dwmac", "snps,dwmac-5.20";
857 reg-names = "stmmaceth";
858 interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
859 interrupt-names = "macirq";
860 clock-names = "stmmaceth",
861 "mac-clk-tx",
862 "mac-clk-rx",
865 "eth-ck";
872 snps,axi-config = <&stmmac_axi_config_1>;
873 snps,mixed-burst;
874 snps,mtl-rx-config = <&mtl_rx_setup_1>;
875 snps,mtl-tx-config = <&mtl_tx_setup_1>;
879 access-controllers = <&rifsc 60>;
882 mtl_rx_setup_1: rx-queues-config {
883 snps,rx-queues-to-use = <2>;
888 mtl_tx_setup_1: tx-queues-config {
889 snps,tx-queues-to-use = <4>;
896 stmmac_axi_config_1: stmmac-axi-config {
905 compatible = "st,stm32mp25-bsec";
907 #address-cells = <1>;
908 #size-cells = <1>;
920 rcc: clock-controller@44200000 {
921 compatible = "st,stm32mp25-rcc";
923 #clock-cells = <1>;
924 #reset-cells = <1>;
1005 access-controllers = <&rifsc 156>;
1008 exti1: interrupt-controller@44220000 {
1009 compatible = "st,stm32mp1-exti", "syscon";
1010 interrupt-controller;
1011 #interrupt-cells = <2>;
1013 interrupts-extended =
1102 compatible = "st,stm32mp25-syscfg", "syscon";
1107 #address-cells = <1>;
1108 #size-cells = <1>;
1109 compatible = "st,stm32mp257-pinctrl";
1111 interrupt-parent = <&exti1>;
1113 pins-are-numbered;
1116 gpio-controller;
1117 #gpio-cells = <2>;
1118 interrupt-controller;
1119 #interrupt-cells = <2>;
1122 st,bank-name = "GPIOA";
1127 gpio-controller;
1128 #gpio-cells = <2>;
1129 interrupt-controller;
1130 #interrupt-cells = <2>;
1133 st,bank-name = "GPIOB";
1138 gpio-controller;
1139 #gpio-cells = <2>;
1140 interrupt-controller;
1141 #interrupt-cells = <2>;
1144 st,bank-name = "GPIOC";
1149 gpio-controller;
1150 #gpio-cells = <2>;
1151 interrupt-controller;
1152 #interrupt-cells = <2>;
1155 st,bank-name = "GPIOD";
1160 gpio-controller;
1161 #gpio-cells = <2>;
1162 interrupt-controller;
1163 #interrupt-cells = <2>;
1166 st,bank-name = "GPIOE";
1171 gpio-controller;
1172 #gpio-cells = <2>;
1173 interrupt-controller;
1174 #interrupt-cells = <2>;
1177 st,bank-name = "GPIOF";
1182 gpio-controller;
1183 #gpio-cells = <2>;
1184 interrupt-controller;
1185 #interrupt-cells = <2>;
1188 st,bank-name = "GPIOG";
1193 gpio-controller;
1194 #gpio-cells = <2>;
1195 interrupt-controller;
1196 #interrupt-cells = <2>;
1199 st,bank-name = "GPIOH";
1204 gpio-controller;
1205 #gpio-cells = <2>;
1206 interrupt-controller;
1207 #interrupt-cells = <2>;
1210 st,bank-name = "GPIOI";
1215 gpio-controller;
1216 #gpio-cells = <2>;
1217 interrupt-controller;
1218 #interrupt-cells = <2>;
1221 st,bank-name = "GPIOJ";
1226 gpio-controller;
1227 #gpio-cells = <2>;
1228 interrupt-controller;
1229 #interrupt-cells = <2>;
1232 st,bank-name = "GPIOK";
1238 compatible = "st,stm32mp25-rtc";
1242 clock-names = "pclk", "rtc_ck";
1243 interrupts-extended = <&exti2 17 IRQ_TYPE_LEVEL_HIGH>;
1248 #address-cells = <1>;
1249 #size-cells = <1>;
1250 compatible = "st,stm32mp257-z-pinctrl";
1252 interrupt-parent = <&exti1>;
1254 pins-are-numbered;
1257 gpio-controller;
1258 #gpio-cells = <2>;
1259 interrupt-controller;
1260 #interrupt-cells = <2>;
1263 st,bank-name = "GPIOZ";
1264 st,bank-ioport = <11>;
1270 exti2: interrupt-controller@46230000 {
1271 compatible = "st,stm32mp1-exti", "syscon";
1272 interrupt-controller;
1273 #interrupt-cells = <2>;
1275 interrupts-extended =