Lines Matching +full:access +full:- +full:controllers
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2025 - All Rights Reserved
6 #include <dt-bindings/clock/st,stm32mp25-rcc.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/regulator/st,stm32mp25-regulator.h>
9 #include <dt-bindings/reset/st,stm32mp25-rcc.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <1>;
17 #size-cells = <0>;
20 compatible = "arm,cortex-a35";
23 enable-method = "psci";
24 power-domains = <&cpu0_pd>;
25 power-domain-names = "psci";
29 arm-pmu {
30 compatible = "arm,cortex-a35-pmu";
32 interrupt-affinity = <&cpu0>;
33 interrupt-parent = <&intc>;
37 compatible = "arm,smc-wdt";
38 arm,smc-id = <0xb200005a>;
42 clk_dsi_txbyte: clock-0 {
43 compatible = "fixed-clock";
44 #clock-cells = <0>;
45 clock-frequency = <0>;
48 clk_rcbsec: clk-64000000 {
49 compatible = "fixed-clock";
50 #clock-cells = <0>;
51 clock-frequency = <64000000>;
56 compatible = "linaro,optee-tz";
58 interrupt-parent = <&intc>;
63 compatible = "linaro,scmi-optee";
64 #address-cells = <1>;
65 #size-cells = <0>;
66 linaro,optee-channel-id = <0>;
70 #clock-cells = <1>;
75 #reset-cells = <1>;
82 #address-cells = <1>;
83 #size-cells = <0>;
87 regulator-name = "vddio1";
91 regulator-name = "vddio2";
95 regulator-name = "vddio3";
99 regulator-name = "vddio4";
103 regulator-name = "vdd33ucpd";
107 regulator-name = "vdda18adc";
115 compatible = "arm,psci-1.0";
118 cpu0_pd: power-domain-cpu0 {
119 #power-domain-cells = <0>;
120 power-domains = <&cluster_pd>;
123 cluster_pd: power-domain-cluster {
124 #power-domain-cells = <0>;
125 power-domains = <&ret_pd>;
128 ret_pd: power-domain-retention {
129 #power-domain-cells = <0>;
134 compatible = "arm,armv8-timer";
135 interrupt-parent = <&intc>;
140 always-on;
144 compatible = "simple-bus";
146 interrupt-parent = <&intc>;
147 #address-cells = <1>;
148 #size-cells = <1>;
150 hpdma: dma-controller@40400000 {
151 compatible = "st,stm32mp25-dma3";
170 #dma-cells = <3>;
173 hpdma2: dma-controller@40410000 {
174 compatible = "st,stm32mp25-dma3";
193 #dma-cells = <3>;
196 hpdma3: dma-controller@40420000 {
197 compatible = "st,stm32mp25-dma3";
216 #dma-cells = <3>;
220 compatible = "st,stm32mp25-rifsc", "simple-bus";
223 #address-cells = <1>;
224 #size-cells = <1>;
225 #access-controller-cells = <1>;
227 i2s2: audio-controller@400b0000 {
228 compatible = "st,stm32mp25-i2s";
230 #sound-dai-cells = <0>;
233 clock-names = "pclk", "i2sclk";
237 dma-names = "rx", "tx";
238 access-controllers = <&rifsc 23>;
243 compatible = "st,stm32mp25-spi";
245 #address-cells = <1>;
246 #size-cells = <0>;
252 dma-names = "rx", "tx";
253 access-controllers = <&rifsc 23>;
257 i2s3: audio-controller@400c0000 {
258 compatible = "st,stm32mp25-i2s";
260 #sound-dai-cells = <0>;
263 clock-names = "pclk", "i2sclk";
267 dma-names = "rx", "tx";
268 access-controllers = <&rifsc 24>;
273 compatible = "st,stm32mp25-spi";
275 #address-cells = <1>;
276 #size-cells = <0>;
282 dma-names = "rx", "tx";
283 access-controllers = <&rifsc 24>;
287 spdifrx: audio-controller@400d0000 {
288 compatible = "st,stm32h7-spdifrx";
290 #sound-dai-cells = <0>;
292 clock-names = "kclk";
296 dma-names = "rx", "rx-ctrl";
297 access-controllers = <&rifsc 30>;
302 compatible = "st,stm32h7-uart";
308 dma-names = "rx", "tx";
309 access-controllers = <&rifsc 32>;
314 compatible = "st,stm32h7-uart";
320 dma-names = "rx", "tx";
321 access-controllers = <&rifsc 33>;
326 compatible = "st,stm32h7-uart";
332 dma-names = "rx", "tx";
333 access-controllers = <&rifsc 34>;
338 compatible = "st,stm32h7-uart";
344 dma-names = "rx", "tx";
345 access-controllers = <&rifsc 35>;
350 compatible = "st,stm32mp25-i2c";
352 #address-cells = <1>;
353 #size-cells = <0>;
354 interrupt-names = "event";
360 dma-names = "rx", "tx";
361 access-controllers = <&rifsc 41>;
366 compatible = "st,stm32mp25-i2c";
368 #address-cells = <1>;
369 #size-cells = <0>;
370 interrupt-names = "event";
376 dma-names = "rx", "tx";
377 access-controllers = <&rifsc 42>;
382 compatible = "st,stm32mp25-i2c";
384 #address-cells = <1>;
385 #size-cells = <0>;
386 interrupt-names = "event";
392 dma-names = "rx", "tx";
393 access-controllers = <&rifsc 47>;
398 compatible = "st,stm32h7-uart";
404 dma-names = "rx", "tx";
405 access-controllers = <&rifsc 36>;
409 i2s1: audio-controller@40230000 {
410 compatible = "st,stm32mp25-i2s";
412 #sound-dai-cells = <0>;
415 clock-names = "pclk", "i2sclk";
419 dma-names = "rx", "tx";
420 access-controllers = <&rifsc 22>;
425 compatible = "st,stm32mp25-spi";
427 #address-cells = <1>;
428 #size-cells = <0>;
434 dma-names = "rx", "tx";
435 access-controllers = <&rifsc 22>;
440 compatible = "st,stm32mp25-spi";
442 #address-cells = <1>;
443 #size-cells = <0>;
449 dma-names = "rx", "tx";
450 access-controllers = <&rifsc 25>;
455 compatible = "st,stm32mp25-spi";
457 #address-cells = <1>;
458 #size-cells = <0>;
464 dma-names = "rx", "tx";
465 access-controllers = <&rifsc 26>;
470 compatible = "st,stm32mp25-sai";
473 #address-cells = <1>;
474 #size-cells = <1>;
476 clock-names = "pclk";
479 access-controllers = <&rifsc 49>;
482 sai1a: audio-controller@40290004 {
483 compatible = "st,stm32-sai-sub-a";
485 #sound-dai-cells = <0>;
487 clock-names = "sai_ck";
492 sai1b: audio-controller@40290024 {
493 compatible = "st,stm32-sai-sub-b";
495 #sound-dai-cells = <0>;
497 clock-names = "sai_ck";
504 compatible = "st,stm32mp25-sai";
507 #address-cells = <1>;
508 #size-cells = <1>;
510 clock-names = "pclk";
513 access-controllers = <&rifsc 50>;
516 sai2a: audio-controller@402a0004 {
517 compatible = "st,stm32-sai-sub-a";
519 #sound-dai-cells = <0>;
521 clock-names = "sai_ck";
526 sai2b: audio-controller@402a0024 {
527 compatible = "st,stm32-sai-sub-b";
529 #sound-dai-cells = <0>;
531 clock-names = "sai_ck";
538 compatible = "st,stm32mp25-sai";
541 #address-cells = <1>;
542 #size-cells = <1>;
544 clock-names = "pclk";
547 access-controllers = <&rifsc 51>;
550 sai3a: audio-controller@402b0004 {
551 compatible = "st,stm32-sai-sub-a";
553 #sound-dai-cells = <0>;
555 clock-names = "sai_ck";
560 sai3b: audio-controller@502b0024 {
561 compatible = "st,stm32-sai-sub-b";
563 #sound-dai-cells = <0>;
565 clock-names = "sai_ck";
572 compatible = "st,stm32h7-uart";
578 dma-names = "rx", "tx";
579 access-controllers = <&rifsc 31>;
584 compatible = "st,stm32mp25-sai";
587 #address-cells = <1>;
588 #size-cells = <1>;
590 clock-names = "pclk";
593 access-controllers = <&rifsc 52>;
596 sai4a: audio-controller@40340004 {
597 compatible = "st,stm32-sai-sub-a";
599 #sound-dai-cells = <0>;
601 clock-names = "sai_ck";
606 sai4b: audio-controller@40340024 {
607 compatible = "st,stm32-sai-sub-b";
609 #sound-dai-cells = <0>;
611 clock-names = "sai_ck";
618 compatible = "st,stm32h7-uart";
624 dma-names = "rx", "tx";
625 access-controllers = <&rifsc 37>;
630 compatible = "st,stm32mp25-rng";
633 clock-names = "core", "bus";
635 access-controllers = <&rifsc 92>;
640 compatible = "st,stm32mp25-spi";
642 #address-cells = <1>;
643 #size-cells = <0>;
649 dma-names = "rx", "tx";
650 access-controllers = <&rifsc 29>;
655 compatible = "st,stm32mp25-i2c";
657 #address-cells = <1>;
658 #size-cells = <0>;
659 interrupt-names = "event";
665 dma-names = "rx", "tx";
666 access-controllers = <&rifsc 48>;
671 compatible = "st,stm32mp25-csi";
677 clock-names = "pclk", "txesc", "csi2phy";
678 access-controllers = <&rifsc 86>;
683 compatible = "st,stm32mp25-dcmipp";
688 clock-names = "kclk", "mclk";
689 access-controllers = <&rifsc 87>;
694 compatible = "st,stm32mp25-sdmmc2", "arm,pl18x", "arm,primecell";
696 arm,primecell-periphid = <0x00353180>;
699 clock-names = "apb_pclk";
701 cap-sd-highspeed;
702 cap-mmc-highspeed;
703 max-frequency = <120000000>;
704 access-controllers = <&rifsc 76>;
709 compatible = "st,stm32mp25-dwmac", "snps,dwmac-5.20";
711 reg-names = "stmmaceth";
712 interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
713 interrupt-names = "macirq";
714 clock-names = "stmmaceth",
715 "mac-clk-tx",
716 "mac-clk-rx",
719 "eth-ck";
726 snps,axi-config = <&stmmac_axi_config_1>;
727 snps,mixed-burst;
728 snps,mtl-rx-config = <&mtl_rx_setup_1>;
729 snps,mtl-tx-config = <&mtl_tx_setup_1>;
733 access-controllers = <&rifsc 60>;
736 mtl_rx_setup_1: rx-queues-config {
737 snps,rx-queues-to-use = <2>;
742 mtl_tx_setup_1: tx-queues-config {
743 snps,tx-queues-to-use = <4>;
750 stmmac_axi_config_1: stmmac-axi-config {
759 compatible = "st,stm32mp25-bsec";
761 #address-cells = <1>;
762 #size-cells = <1>;
774 rcc: clock-controller@44200000 {
775 compatible = "st,stm32mp25-rcc";
777 #clock-cells = <1>;
778 #reset-cells = <1>;
859 access-controllers = <&rifsc 156>;
862 exti1: interrupt-controller@44220000 {
863 compatible = "st,stm32mp1-exti", "syscon";
865 interrupt-controller;
866 #interrupt-cells = <2>;
867 interrupts-extended =
956 compatible = "st,stm32mp23-syscfg", "syscon";
961 compatible = "st,stm32mp257-pinctrl";
963 #address-cells = <1>;
964 #size-cells = <1>;
965 interrupt-parent = <&exti1>;
967 pins-are-numbered;
971 gpio-controller;
972 #gpio-cells = <2>;
973 interrupt-controller;
974 #interrupt-cells = <2>;
976 st,bank-name = "GPIOA";
982 gpio-controller;
983 #gpio-cells = <2>;
984 interrupt-controller;
985 #interrupt-cells = <2>;
987 st,bank-name = "GPIOB";
993 gpio-controller;
994 #gpio-cells = <2>;
995 interrupt-controller;
996 #interrupt-cells = <2>;
998 st,bank-name = "GPIOC";
1004 gpio-controller;
1005 #gpio-cells = <2>;
1006 interrupt-controller;
1007 #interrupt-cells = <2>;
1009 st,bank-name = "GPIOD";
1015 gpio-controller;
1016 #gpio-cells = <2>;
1017 interrupt-controller;
1018 #interrupt-cells = <2>;
1020 st,bank-name = "GPIOE";
1026 gpio-controller;
1027 #gpio-cells = <2>;
1028 interrupt-controller;
1029 #interrupt-cells = <2>;
1031 st,bank-name = "GPIOF";
1037 gpio-controller;
1038 #gpio-cells = <2>;
1039 interrupt-controller;
1040 #interrupt-cells = <2>;
1042 st,bank-name = "GPIOG";
1048 gpio-controller;
1049 #gpio-cells = <2>;
1050 interrupt-controller;
1051 #interrupt-cells = <2>;
1053 st,bank-name = "GPIOH";
1059 gpio-controller;
1060 #gpio-cells = <2>;
1061 interrupt-controller;
1062 #interrupt-cells = <2>;
1064 st,bank-name = "GPIOI";
1070 gpio-controller;
1071 #gpio-cells = <2>;
1072 interrupt-controller;
1073 #interrupt-cells = <2>;
1075 st,bank-name = "GPIOJ";
1081 gpio-controller;
1082 #gpio-cells = <2>;
1083 interrupt-controller;
1084 #interrupt-cells = <2>;
1086 st,bank-name = "GPIOK";
1092 compatible = "st,stm32mp25-rtc";
1096 clock-names = "pclk", "rtc_ck";
1097 interrupts-extended = <&exti2 17 IRQ_TYPE_LEVEL_HIGH>;
1102 compatible = "st,stm32mp257-z-pinctrl";
1104 #address-cells = <1>;
1105 #size-cells = <1>;
1106 interrupt-parent = <&exti1>;
1108 pins-are-numbered;
1112 gpio-controller;
1113 #gpio-cells = <2>;
1114 interrupt-controller;
1115 #interrupt-cells = <2>;
1117 st,bank-name = "GPIOZ";
1118 st,bank-ioport = <11>;
1124 exti2: interrupt-controller@46230000 {
1125 compatible = "st,stm32mp1-exti", "syscon";
1127 interrupt-controller;
1128 #interrupt-cells = <2>;
1129 interrupts-extended =
1203 intc: interrupt-controller@4ac10000 {
1204 compatible = "arm,gic-400";
1209 #interrupt-cells = <3>;
1210 interrupt-controller;