Lines Matching +full:0 +full:x400

17 		#size-cells = <0>;
19 cpu0: cpu@0 {
21 reg = <0>;
38 arm,smc-id = <0xb200005a>;
42 clk_dsi_txbyte: clock-0 {
44 #clock-cells = <0>;
45 clock-frequency = <0>;
50 #clock-cells = <0>;
65 #size-cells = <0>;
66 linaro,optee-channel-id = <0>;
69 reg = <0x14>;
74 reg = <0x16>;
79 reg = <0x17>;
83 #size-cells = <0>;
85 scmi_vddio1: regulator@0 {
119 #power-domain-cells = <0>;
124 #power-domain-cells = <0>;
129 #power-domain-cells = <0>;
143 soc@0 {
145 ranges = <0x0 0x0 0x0 0x80000000>;
152 reg = <0x40400000 0x1000>;
175 reg = <0x40410000 0x1000>;
198 reg = <0x40420000 0x1000>;
221 reg = <0x42080000 0x1000>;
229 reg = <0x400b0000 0x400>;
230 #sound-dai-cells = <0>;
235 dmas = <&hpdma 51 0x43 0x12>,
236 <&hpdma 52 0x43 0x21>;
244 reg = <0x400b0000 0x400>;
246 #size-cells = <0>;
250 dmas = <&hpdma 51 0x20 0x3012>,
251 <&hpdma 52 0x20 0x3021>;
259 reg = <0x400c0000 0x400>;
260 #sound-dai-cells = <0>;
265 dmas = <&hpdma 53 0x43 0x12>,
266 <&hpdma 54 0x43 0x21>;
274 reg = <0x400c0000 0x400>;
276 #size-cells = <0>;
280 dmas = <&hpdma 53 0x20 0x3012>,
281 <&hpdma 54 0x20 0x3021>;
289 reg = <0x400d0000 0x400>;
290 #sound-dai-cells = <0>;
294 dmas = <&hpdma 71 0x43 0x212>,
295 <&hpdma 72 0x43 0x212>;
303 reg = <0x400e0000 0x400>;
306 dmas = <&hpdma 11 0x20 0x10012>,
307 <&hpdma 12 0x20 0x3021>;
315 reg = <0x400f0000 0x400>;
318 dmas = <&hpdma 13 0x20 0x10012>,
319 <&hpdma 14 0x20 0x3021>;
327 reg = <0x40100000 0x400>;
330 dmas = <&hpdma 15 0x20 0x10012>,
331 <&hpdma 16 0x20 0x3021>;
339 reg = <0x40110000 0x400>;
342 dmas = <&hpdma 17 0x20 0x10012>,
343 <&hpdma 18 0x20 0x3021>;
351 reg = <0x40120000 0x400>;
353 #size-cells = <0>;
358 dmas = <&hpdma 27 0x20 0x3012>,
359 <&hpdma 28 0x20 0x3021>;
367 reg = <0x40130000 0x400>;
369 #size-cells = <0>;
374 dmas = <&hpdma 30 0x20 0x3012>,
375 <&hpdma 31 0x20 0x3021>;
383 reg = <0x40180000 0x400>;
385 #size-cells = <0>;
390 dmas = <&hpdma 45 0x20 0x3012>,
391 <&hpdma 46 0x20 0x3021>;
399 reg = <0x40220000 0x400>;
402 dmas = <&hpdma 19 0x20 0x10012>,
403 <&hpdma 20 0x20 0x3021>;
411 reg = <0x40230000 0x400>;
412 #sound-dai-cells = <0>;
417 dmas = <&hpdma 49 0x43 0x12>,
418 <&hpdma 50 0x43 0x21>;
426 reg = <0x40230000 0x400>;
428 #size-cells = <0>;
432 dmas = <&hpdma 49 0x20 0x3012>,
433 <&hpdma 50 0x20 0x3021>;
441 reg = <0x40240000 0x400>;
443 #size-cells = <0>;
447 dmas = <&hpdma 55 0x20 0x3012>,
448 <&hpdma 56 0x20 0x3021>;
456 reg = <0x40280000 0x400>;
458 #size-cells = <0>;
462 dmas = <&hpdma 57 0x20 0x3012>,
463 <&hpdma 58 0x20 0x3021>;
471 reg = <0x40290000 0x4>, <0x4029a3f0 0x10>;
472 ranges = <0 0x40290000 0x400>;
484 reg = <0x4 0x20>;
485 #sound-dai-cells = <0>;
488 dmas = <&hpdma 73 0x43 0x21>;
494 reg = <0x24 0x20>;
495 #sound-dai-cells = <0>;
498 dmas = <&hpdma 74 0x43 0x12>;
505 reg = <0x402a0000 0x4>, <0x402aa3f0 0x10>;
506 ranges = <0 0x402a0000 0x400>;
518 reg = <0x4 0x20>;
519 #sound-dai-cells = <0>;
522 dmas = <&hpdma 75 0x43 0x21>;
528 reg = <0x24 0x20>;
529 #sound-dai-cells = <0>;
532 dmas = <&hpdma 76 0x43 0x12>;
539 reg = <0x402b0000 0x4>, <0x402ba3f0 0x10>;
540 ranges = <0 0x402b0000 0x400>;
552 reg = <0x4 0x20>;
553 #sound-dai-cells = <0>;
556 dmas = <&hpdma 77 0x43 0x21>;
562 reg = <0x24 0x20>;
563 #sound-dai-cells = <0>;
566 dmas = <&hpdma 78 0x43 0x12>;
573 reg = <0x40330000 0x400>;
576 dmas = <&hpdma 9 0x20 0x10012>,
577 <&hpdma 10 0x20 0x3021>;
585 reg = <0x40340000 0x4>, <0x4034a3f0 0x10>;
586 ranges = <0 0x40340000 0x400>;
598 reg = <0x4 0x20>;
599 #sound-dai-cells = <0>;
602 dmas = <&hpdma 79 0x63 0x21>;
608 reg = <0x24 0x20>;
609 #sound-dai-cells = <0>;
612 dmas = <&hpdma 80 0x43 0x12>;
619 reg = <0x40370000 0x400>;
622 dmas = <&hpdma 21 0x20 0x10012>,
623 <&hpdma 22 0x20 0x3021>;
631 reg = <0x42020000 0x400>;
641 reg = <0x46020000 0x400>;
643 #size-cells = <0>;
647 dmas = <&hpdma 171 0x20 0x3012>,
648 <&hpdma 172 0x20 0x3021>;
656 reg = <0x46040000 0x400>;
658 #size-cells = <0>;
663 dmas = <&hpdma 168 0x20 0x3012>,
664 <&hpdma 169 0x20 0x3021>;
672 reg = <0x48020000 0x2000>;
684 reg = <0x48030000 0x1000>;
695 reg = <0x48220000 0x400>, <0x44230400 0x8>;
696 arm,primecell-periphid = <0x00353180>;
710 reg = <0x482c0000 0x4000>;
732 st,syscon = <&syscfg 0x3000>;
751 snps,blen = <0 0 0 0 16 8 4>;
752 snps,rd_osr_lmt = <0x7>;
753 snps,wr_osr_lmt = <0x7>;
760 reg = <0x44000000 0x1000>;
765 reg = <0x24 0x4>;
769 reg = <0x1e8 0x1>;
770 bits = <0 3>;
776 reg = <0x44200000 0x10000>;
864 reg = <0x44220000 0x400>;
884 <&intc GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
888 <0>, /* EXTI_20 */
903 <0>,
919 <0>,
920 <0>,
921 <0>,
922 <0>,
923 <0>,
924 <0>,
925 <0>,
926 <0>,
928 <0>, /* EXTI_60 */
930 <0>,
931 <0>,
933 <0>,
934 <0>,
937 <0>,
939 <0>,
948 <0>, /* EXTI_80 */
949 <0>,
950 <0>,
957 reg = <0x44230000 0x10000>;
962 ranges = <0 0x44240000 0xa0400>;
966 st,syscfg = <&exti1 0x60 0xff>;
970 reg = <0x0 0x400>;
981 reg = <0x10000 0x400>;
992 reg = <0x20000 0x400>;
1003 reg = <0x30000 0x400>;
1014 reg = <0x40000 0x400>;
1025 reg = <0x50000 0x400>;
1036 reg = <0x60000 0x400>;
1047 reg = <0x70000 0x400>;
1058 reg = <0x80000 0x400>;
1069 reg = <0x90000 0x400>;
1080 reg = <0xa0000 0x400>;
1093 reg = <0x46000000 0x400>;
1103 ranges = <0 0x46200000 0x400>;
1107 st,syscfg = <&exti1 0x60 0xff>;
1111 reg = <0 0x400>;
1126 reg = <0x46230000 0x400>;
1148 <0>,
1149 <0>,
1150 <0>, /* EXTI_20 */
1153 <0>,
1154 <0>,
1158 <0>,
1162 <0>,
1165 <0>,
1166 <0>,
1168 <0>,
1169 <0>,
1171 <0>,
1172 <0>,
1174 <0>,
1175 <0>,
1177 <0>,
1184 <0>,
1185 <0>,
1186 <0>,
1187 <0>,
1188 <0>,
1189 <0>,
1190 <0>, /* EXTI_60 */
1193 <0>,
1198 <0>,
1199 <0>,
1205 reg = <0x4ac10000 0x1000>,
1206 <0x4ac20000 0x20000>,
1207 <0x4ac40000 0x20000>,
1208 <0x4ac60000 0x20000>;