Lines Matching +full:regulator +full:- +full:on +full:- +full:in +full:- +full:suspend
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Based on RK3588-EVB1 devicetree
11 /dts-v1/;
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/pinctrl/rockchip.h>
24 fan: pwm-fan {
25 compatible = "pwm-fan";
26 cooling-levels = <0 25 95 145 195 255>;
27 fan-supply = <&vcc5v0_sys>;
28 pinctrl-names = "default";
29 pinctrl-0 = <&pwm0m2_pins &fan_int>;
30 interrupt-parent = <&gpio0>;
33 #cooling-cells = <2>;
36 vcc3v3_pcie30: regulator-vcc3v3-pcie30 {
37 compatible = "regulator-fixed";
38 regulator-name = "vcc3v3_pcie30";
39 regulator-min-microvolt = <3300000>;
40 regulator-max-microvolt = <3300000>;
41 enable-active-high;
43 pinctrl-names = "default";
44 pinctrl-0 = <&vcc3v3_pcie30_en>;
45 startup-delay-us = <5000>;
48 vcc5v0_sys: regulator-vcc5v0-sys {
49 compatible = "regulator-fixed";
50 regulator-name = "vcc5v0_sys";
51 regulator-always-on;
52 regulator-boot-on;
53 regulator-min-microvolt = <5000000>;
54 regulator-max-microvolt = <5000000>;
57 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
58 compatible = "regulator-fixed";
59 regulator-name = "vcc_1v1_nldo_s3";
60 regulator-always-on;
61 regulator-boot-on;
62 regulator-min-microvolt = <1100000>;
63 regulator-max-microvolt = <1100000>;
64 vin-supply = <&vcc5v0_sys>;
73 cpu-supply = <&vdd_cpu_big0_s0>;
77 cpu-supply = <&vdd_cpu_big0_s0>;
81 cpu-supply = <&vdd_cpu_big1_s0>;
85 cpu-supply = <&vdd_cpu_big1_s0>;
89 cpu-supply = <&vdd_cpu_lit_s0>;
93 cpu-supply = <&vdd_cpu_lit_s0>;
97 cpu-supply = <&vdd_cpu_lit_s0>;
101 cpu-supply = <&vdd_cpu_lit_s0>;
106 phy-handle = <&rgmii_phy>;
107 phy-mode = "rgmii-rxid";
108 pinctrl-0 = <&gmac1_miim
113 pinctrl-names = "default";
120 mali-supply = <&vdd_gpu_s0>;
125 pinctrl-names = "default";
126 pinctrl-0 = <&i2c0m2_xfer>;
129 vdd_cpu_big0_s0: regulator@42 {
132 fcs,suspend-voltage-selector = <1>;
133 regulator-name = "vdd_cpu_big0_s0";
134 regulator-always-on;
135 regulator-boot-on;
136 regulator-min-microvolt = <550000>;
137 regulator-max-microvolt = <1050000>;
138 regulator-ramp-delay = <2300>;
139 vin-supply = <&vcc5v0_sys>;
141 regulator-state-mem {
142 regulator-off-in-suspend;
146 vdd_cpu_big1_s0: regulator@43 {
149 fcs,suspend-voltage-selector = <1>;
150 regulator-name = "vdd_cpu_big1_s0";
151 regulator-always-on;
152 regulator-boot-on;
153 regulator-min-microvolt = <550000>;
154 regulator-max-microvolt = <1050000>;
155 regulator-ramp-delay = <2300>;
156 vin-supply = <&vcc5v0_sys>;
158 regulator-state-mem {
159 regulator-off-in-suspend;
165 pinctrl-names = "default";
166 pinctrl-0 = <&i2c1m2_xfer>;
169 vdd_npu_s0: regulator@42 {
172 fcs,suspend-voltage-selector = <1>;
173 regulator-name = "vdd_npu_s0";
174 regulator-always-on;
175 regulator-boot-on;
176 regulator-min-microvolt = <550000>;
177 regulator-max-microvolt = <950000>;
178 regulator-ramp-delay = <2300>;
179 vin-supply = <&vcc5v0_sys>;
181 regulator-state-mem {
182 regulator-off-in-suspend;
193 #clock-cells = <0>;
194 clock-output-names = "hym8563";
195 pinctrl-names = "default";
196 pinctrl-0 = <&hym8563_int>;
197 interrupt-parent = <&gpio0>;
199 wakeup-source;
204 rgmii_phy: ethernet-phy@1 {
206 compatible = "ethernet-phy-id001c.c916";
208 pinctrl-names = "default";
209 pinctrl-0 = <&rtl8211f_rst>;
210 reset-assert-us = <15000>;
211 reset-deassert-us = <50000>;
212 reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
217 polling-delay = <1000>;
220 package_active1: trip-active1 {
225 package_active2: trip-active2 {
230 package_active3: trip-active3 {
235 package_active4: trip-active4 {
240 package_active5: trip-active5 {
247 cooling-maps {
250 cooling-device = <&fan 1 1>;
254 cooling-device = <&fan 2 2>;
258 cooling-device = <&fan 3 3>;
262 cooling-device = <&fan 4 4>;
266 cooling-device = <&fan 5 5>;
272 linux,pci-domain = <1>;
273 pinctrl-names = "default";
274 pinctrl-0 = <&pcie2_reset>, <&pcie30x1m1_0_clkreqn>, <&pcie30x1m1_0_waken>;
275 reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
284 linux,pci-domain = <0>;
285 pinctrl-names = "default";
286 pinctrl-0 = <&pcie3_reset>, <&pcie30x4m1_clkreqn>, <&pcie30x4m1_waken>;
287 reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
288 vpcie3v3-supply = <&vcc3v3_pcie30>;
293 domain-supply = <&vdd_gpu_s0>;
298 fan_int: fan-int {
304 hym8563_int: hym8563-int {
310 pcie2_reset: pcie2-reset {
316 pcie3_reset: pcie3-reset {
320 vcc3v3_pcie30_en: pcie3-reg {
326 rtl8211f_rst: rtl8211f-rst {
337 bus-width = <8>;
338 no-sdio;
339 no-sd;
340 non-removable;
341 mmc-hs400-1_8v;
342 mmc-hs400-enhanced-strobe;
348 pinctrl-names = "default";
349 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
350 num-cs = <1>;
354 spi-max-frequency = <1000000>;
357 interrupt-parent = <&gpio0>;
360 pinctrl-names = "default";
361 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
363 system-power-controller;
365 vcc1-supply = <&vcc5v0_sys>;
366 vcc2-supply = <&vcc5v0_sys>;
367 vcc3-supply = <&vcc5v0_sys>;
368 vcc4-supply = <&vcc5v0_sys>;
369 vcc5-supply = <&vcc5v0_sys>;
370 vcc6-supply = <&vcc5v0_sys>;
371 vcc7-supply = <&vcc5v0_sys>;
372 vcc8-supply = <&vcc5v0_sys>;
373 vcc9-supply = <&vcc5v0_sys>;
374 vcc10-supply = <&vcc5v0_sys>;
375 vcc11-supply = <&vcc_2v0_pldo_s3>;
376 vcc12-supply = <&vcc5v0_sys>;
377 vcc13-supply = <&vcc_1v1_nldo_s3>;
378 vcc14-supply = <&vcc_1v1_nldo_s3>;
379 vcca-supply = <&vcc5v0_sys>;
381 gpio-controller;
382 #gpio-cells = <2>;
384 rk806_dvs1_null: dvs1-null-pins {
389 rk806_dvs2_null: dvs2-null-pins {
394 rk806_dvs3_null: dvs3-null-pins {
400 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
403 * without this regulator active, but it
404 * doesn't have to be on when the GPU PD is
410 regulator-always-on;
412 regulator-boot-on;
413 regulator-min-microvolt = <550000>;
414 regulator-max-microvolt = <950000>;
415 regulator-ramp-delay = <12500>;
416 regulator-name = "vdd_gpu_s0";
417 regulator-enable-ramp-delay = <400>;
419 regulator-state-mem {
420 regulator-off-in-suspend;
424 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
425 regulator-always-on;
426 regulator-boot-on;
427 regulator-min-microvolt = <550000>;
428 regulator-max-microvolt = <950000>;
429 regulator-ramp-delay = <12500>;
430 regulator-name = "vdd_cpu_lit_s0";
432 regulator-state-mem {
433 regulator-off-in-suspend;
437 vdd_log_s0: dcdc-reg3 {
438 regulator-always-on;
439 regulator-boot-on;
440 regulator-min-microvolt = <675000>;
441 regulator-max-microvolt = <750000>;
442 regulator-ramp-delay = <12500>;
443 regulator-name = "vdd_log_s0";
445 regulator-state-mem {
446 regulator-off-in-suspend;
447 regulator-suspend-microvolt = <750000>;
451 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
452 regulator-always-on;
453 regulator-boot-on;
454 regulator-min-microvolt = <550000>;
455 regulator-max-microvolt = <950000>;
456 regulator-ramp-delay = <12500>;
457 regulator-name = "vdd_vdenc_s0";
459 regulator-state-mem {
460 regulator-off-in-suspend;
464 vdd_ddr_s0: dcdc-reg5 {
465 regulator-always-on;
466 regulator-boot-on;
467 regulator-min-microvolt = <675000>;
468 regulator-max-microvolt = <900000>;
469 regulator-ramp-delay = <12500>;
470 regulator-name = "vdd_ddr_s0";
472 regulator-state-mem {
473 regulator-off-in-suspend;
474 regulator-suspend-microvolt = <850000>;
478 vdd2_ddr_s3: dcdc-reg6 {
479 regulator-always-on;
480 regulator-boot-on;
481 regulator-name = "vdd2_ddr_s3";
483 regulator-state-mem {
484 regulator-on-in-suspend;
488 vcc_2v0_pldo_s3: dcdc-reg7 {
489 regulator-always-on;
490 regulator-boot-on;
491 regulator-min-microvolt = <2000000>;
492 regulator-max-microvolt = <2000000>;
493 regulator-ramp-delay = <12500>;
494 regulator-name = "vdd_2v0_pldo_s3";
496 regulator-state-mem {
497 regulator-on-in-suspend;
498 regulator-suspend-microvolt = <2000000>;
502 vcc_3v3_s3: dcdc-reg8 {
503 regulator-always-on;
504 regulator-boot-on;
505 regulator-min-microvolt = <3300000>;
506 regulator-max-microvolt = <3300000>;
507 regulator-name = "vcc_3v3_s3";
509 regulator-state-mem {
510 regulator-on-in-suspend;
511 regulator-suspend-microvolt = <3300000>;
515 vddq_ddr_s0: dcdc-reg9 {
516 regulator-always-on;
517 regulator-boot-on;
518 regulator-name = "vddq_ddr_s0";
520 regulator-state-mem {
521 regulator-off-in-suspend;
525 vcc_1v8_s3: dcdc-reg10 {
526 regulator-always-on;
527 regulator-boot-on;
528 regulator-min-microvolt = <1800000>;
529 regulator-max-microvolt = <1800000>;
530 regulator-name = "vcc_1v8_s3";
532 regulator-state-mem {
533 regulator-on-in-suspend;
534 regulator-suspend-microvolt = <1800000>;
538 avcc_1v8_s0: pldo-reg1 {
539 regulator-always-on;
540 regulator-boot-on;
541 regulator-min-microvolt = <1800000>;
542 regulator-max-microvolt = <1800000>;
543 regulator-name = "avcc_1v8_s0";
545 regulator-state-mem {
546 regulator-off-in-suspend;
550 vcc_1v8_s0: pldo-reg2 {
551 regulator-always-on;
552 regulator-boot-on;
553 regulator-min-microvolt = <1800000>;
554 regulator-max-microvolt = <1800000>;
555 regulator-name = "vcc_1v8_s0";
557 regulator-state-mem {
558 regulator-off-in-suspend;
559 regulator-suspend-microvolt = <1800000>;
563 avdd_1v2_s0: pldo-reg3 {
564 regulator-always-on;
565 regulator-boot-on;
566 regulator-min-microvolt = <1200000>;
567 regulator-max-microvolt = <1200000>;
568 regulator-name = "avdd_1v2_s0";
570 regulator-state-mem {
571 regulator-off-in-suspend;
575 vcc_3v3_s0: pldo-reg4 {
576 regulator-always-on;
577 regulator-boot-on;
578 regulator-min-microvolt = <3300000>;
579 regulator-max-microvolt = <3300000>;
580 regulator-ramp-delay = <12500>;
581 regulator-name = "vcc_3v3_s0";
583 regulator-state-mem {
584 regulator-off-in-suspend;
588 vccio_sd_s0: pldo-reg5 {
589 regulator-always-on;
590 regulator-boot-on;
591 regulator-min-microvolt = <1800000>;
592 regulator-max-microvolt = <3300000>;
593 regulator-ramp-delay = <12500>;
594 regulator-name = "vccio_sd_s0";
596 regulator-state-mem {
597 regulator-off-in-suspend;
601 pldo6_s3: pldo-reg6 {
602 regulator-always-on;
603 regulator-boot-on;
604 regulator-min-microvolt = <1800000>;
605 regulator-max-microvolt = <1800000>;
606 regulator-name = "pldo6_s3";
608 regulator-state-mem {
609 regulator-on-in-suspend;
610 regulator-suspend-microvolt = <1800000>;
614 vdd_0v75_s3: nldo-reg1 {
615 regulator-always-on;
616 regulator-boot-on;
617 regulator-min-microvolt = <750000>;
618 regulator-max-microvolt = <750000>;
619 regulator-name = "vdd_0v75_s3";
621 regulator-state-mem {
622 regulator-on-in-suspend;
623 regulator-suspend-microvolt = <750000>;
627 vdd_ddr_pll_s0: nldo-reg2 {
628 regulator-always-on;
629 regulator-boot-on;
630 regulator-min-microvolt = <850000>;
631 regulator-max-microvolt = <850000>;
632 regulator-name = "vdd_ddr_pll_s0";
634 regulator-state-mem {
635 regulator-off-in-suspend;
636 regulator-suspend-microvolt = <850000>;
640 avdd_0v75_s0: nldo-reg3 {
641 regulator-always-on;
642 regulator-boot-on;
643 regulator-min-microvolt = <750000>;
644 regulator-max-microvolt = <750000>;
645 regulator-name = "avdd_0v75_s0";
647 regulator-state-mem {
648 regulator-off-in-suspend;
652 vdd_0v85_s0: nldo-reg4 {
653 regulator-always-on;
654 regulator-boot-on;
655 regulator-min-microvolt = <850000>;
656 regulator-max-microvolt = <850000>;
657 regulator-name = "vdd_0v85_s0";
659 regulator-state-mem {
660 regulator-off-in-suspend;
664 vdd_0v75_s0: nldo-reg5 {
665 regulator-always-on;
666 regulator-boot-on;
667 regulator-min-microvolt = <750000>;
668 regulator-max-microvolt = <750000>;
669 regulator-name = "vdd_0v75_s0";
671 regulator-state-mem {
672 regulator-off-in-suspend;
684 pinctrl-0 = <&uart2m0_xfer>;
689 pinctrl-0 = <&uart9m0_xfer>;
693 /* USB 0: USB 2.0 only, OTG-capable */
704 * TODO: On the RK1, USBDP0 drives the DisplayPort pins and is not
705 * involved in this USB2-only bus. The bus controller (below) needs to
707 * USB3-related signals. This is handled in hardware by updating the
709 * puts the code to do that in the USBDP driver, so USBDP0 must be
712 rockchip,dp-lane-mux = <0 1 2 3>; /* "No USB lanes" */
718 maximum-speed = "high-speed";