Lines Matching +full:gated +full:- +full:fixed +full:- +full:clock
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
12 compatible = "tsd,rk3588-tiger", "rockchip,rk3588";
20 emmc_pwrseq: emmc-pwrseq {
21 compatible = "mmc-pwrseq-emmc";
22 pinctrl-0 = <&emmc_reset>;
23 pinctrl-names = "default";
24 reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
27 extcon_usb3: extcon-usb3 {
28 compatible = "linux,extcon-usb-gpio";
29 id-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&usb3_id>;
36 compatible = "gpio-leds";
37 pinctrl-names = "default";
38 pinctrl-0 = <&module_led_pin>;
41 led-1 {
44 linux,default-trigger = "heartbeat";
50 * 100MHz reference clock for PCIe peripherals from PI6C557-05BLE
51 * clock generator.
52 * The clock output is gated via the OE pin on the clock generator.
53 * This is modeled as a fixed-clock plus a gpio-gate-clock.
55 pcie_refclk_gen: pcie-refclk-gen-clock {
56 compatible = "fixed-clock";
57 #clock-cells = <0>;
58 clock-frequency = <100000000>;
61 pcie_refclk: pcie-refclk-clock {
62 compatible = "gpio-gate-clock";
64 #clock-cells = <0>;
65 enable-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; /* PCIE30X4_CLKREQN_M1_L */
68 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
69 compatible = "regulator-fixed";
70 regulator-name = "vcc_1v1_nldo_s3";
71 regulator-always-on;
72 regulator-boot-on;
73 regulator-min-microvolt = <1100000>;
74 regulator-max-microvolt = <1100000>;
75 vin-supply = <&vcc5v0_sys>;
78 vcc_1v2_s3: regulator-vcc-1v2-s3 {
79 compatible = "regulator-fixed";
80 regulator-name = "vcc_1v2_s3";
81 regulator-always-on;
82 regulator-boot-on;
83 regulator-min-microvolt = <1200000>;
84 regulator-max-microvolt = <1200000>;
85 vin-supply = <&vcc5v0_sys>;
88 vcc5v0_sys: regulator-vcc5v0-sys {
89 compatible = "regulator-fixed";
90 regulator-name = "vcc5v0_sys";
91 regulator-always-on;
92 regulator-boot-on;
93 regulator-min-microvolt = <5000000>;
94 regulator-max-microvolt = <5000000>;
95 vin-supply = <&vcc5v0_baseboard>;
100 cpu-supply = <&vdd_cpu_big0_s0>;
104 cpu-supply = <&vdd_cpu_big0_s0>;
108 cpu-supply = <&vdd_cpu_big1_s0>;
112 cpu-supply = <&vdd_cpu_big1_s0>;
116 cpu-supply = <&vdd_cpu_lit_s0>;
120 cpu-supply = <&vdd_cpu_lit_s0>;
124 cpu-supply = <&vdd_cpu_lit_s0>;
128 cpu-supply = <&vdd_cpu_lit_s0>;
133 phy-handle = <&rgmii_phy>;
134 phy-mode = "rgmii";
135 phy-supply = <&vcc_1v2_s3>;
136 pinctrl-names = "default";
137 pinctrl-0 = <&gmac0_miim
146 snps,reset-gpio = <&gpio4 RK_PC3 GPIO_ACTIVE_LOW>;
147 snps,reset-active-low;
148 snps,reset-delays-us = <0 10000 100000>;
152 mali-supply = <&vdd_gpu_s0>;
157 pinctrl-names = "default";
158 pinctrl-0 = <&hdmim1_tx0_cec &hdmim0_tx0_hpd &hdmim1_tx0_scl
163 pinctrl-0 = <&i2c1m0_xfer>;
175 pinctrl-0 = <&i2c2m3_xfer>;
187 pinctrl-0 = <&i2c3m0_xfer>;
191 pinctrl-0 = <&i2c4m4_xfer>;
197 fcs,suspend-voltage-selector = <1>;
198 regulator-name = "vdd_npu_s0";
199 regulator-always-on;
200 regulator-boot-on;
201 regulator-min-microvolt = <550000>;
202 regulator-max-microvolt = <950000>;
203 regulator-ramp-delay = <2300>;
204 vin-supply = <&vcc5v0_sys>;
206 regulator-state-mem {
207 regulator-off-in-suspend;
213 pinctrl-0 = <&i2c5m1_xfer>;
226 * Mule-ATtiny can handle up to Fast mode Plus (1MHz) on I2C bus,
229 clock-frequency = <400000>;
236 i2c-mux {
237 compatible = "tsd,mule-i2c-mux";
238 #address-cells = <1>;
239 #size-cells = <0>;
243 #address-cells = <1>;
244 #size-cells = <0>;
269 fcs,suspend-voltage-selector = <1>;
270 regulator-name = "vdd_cpu_big0_s0";
271 regulator-always-on;
272 regulator-boot-on;
273 regulator-min-microvolt = <550000>;
274 regulator-max-microvolt = <1050000>;
275 regulator-ramp-delay = <2300>;
276 vin-supply = <&vcc5v0_sys>;
278 regulator-state-mem {
279 regulator-off-in-suspend;
286 fcs,suspend-voltage-selector = <1>;
287 regulator-name = "vdd_cpu_big1_s0";
288 regulator-always-on;
289 regulator-boot-on;
290 regulator-min-microvolt = <550000>;
291 regulator-max-microvolt = <1050000>;
292 regulator-ramp-delay = <2300>;
293 vin-supply = <&vcc5v0_sys>;
295 regulator-state-mem {
296 regulator-off-in-suspend;
310 pinctrl-0 = <&i2c8m2_xfer>;
314 rgmii_phy: ethernet-phy@6 {
316 compatible = "ethernet-phy-ieee802.3-c22";
324 * The board has a gpio-controlled "pcie_refclk" generator,
331 clock-names = "aclk_mst", "aclk_slv",
335 reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
339 domain-supply = <&vdd_gpu_s0>;
344 emmc_reset: emmc-reset {
350 eth_reset: eth-reset {
356 module_led_pin: module-led-pin {
362 usb3_id: usb3-id {
370 pinctrl-0 = <&pwm0m1_pins>;
371 pinctrl-names = "default";
375 vref-supply = <&vcc_1v8_s0>;
380 bus-width = <8>;
381 cap-mmc-highspeed;
382 mmc-ddr-1_8v;
383 mmc-hs200-1_8v;
384 mmc-hs400-1_8v;
385 mmc-hs400-enhanced-strobe;
386 mmc-pwrseq = <&emmc_pwrseq>;
387 no-sdio;
388 no-sd;
389 non-removable;
390 pinctrl-names = "default";
391 pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_data_strobe>;
392 vmmc-supply = <&vcc_3v3_s3>;
393 vqmmc-supply = <&vcc_1v8_s3>;
398 bus-width = <4>;
399 cap-sd-highspeed;
400 max-frequency = <150000000>;
401 vqmmc-supply = <&vccio_sd_s0>;
405 pinctrl-0 = <&spi0m1_cs0 &spi0m1_cs1 &spi0m3_pins>;
409 assigned-clocks = <&cru CLK_SPI2>;
410 assigned-clock-rates = <200000000>;
411 num-cs = <1>;
412 pinctrl-names = "default";
413 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
419 interrupt-parent = <&gpio0>;
421 gpio-controller;
422 #gpio-cells = <2>;
423 pinctrl-names = "default";
424 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
426 spi-max-frequency = <1000000>;
427 system-power-controller;
428 vcc1-supply = <&vcc5v0_sys>;
429 vcc2-supply = <&vcc5v0_sys>;
430 vcc3-supply = <&vcc5v0_sys>;
431 vcc4-supply = <&vcc5v0_sys>;
432 vcc5-supply = <&vcc5v0_sys>;
433 vcc6-supply = <&vcc5v0_sys>;
434 vcc7-supply = <&vcc5v0_sys>;
435 vcc8-supply = <&vcc5v0_sys>;
436 vcc9-supply = <&vcc5v0_sys>;
437 vcc10-supply = <&vcc5v0_sys>;
438 vcc11-supply = <&vcc_2v0_pldo_s3>;
439 vcc12-supply = <&vcc5v0_sys>;
440 vcc13-supply = <&vcc_1v1_nldo_s3>;
441 vcc14-supply = <&vcc_1v1_nldo_s3>;
442 vcca-supply = <&vcc5v0_sys>;
444 rk806_dvs1_null: dvs1-null-pins {
449 rk806_dvs2_null: dvs2-null-pins {
454 rk806_dvs3_null: dvs3-null-pins {
460 vdd_gpu_s0: dcdc-reg1 {
461 regulator-boot-on;
462 regulator-min-microvolt = <550000>;
463 regulator-max-microvolt = <950000>;
464 regulator-ramp-delay = <12500>;
465 regulator-name = "vdd_gpu_s0";
466 regulator-enable-ramp-delay = <400>;
468 regulator-state-mem {
469 regulator-off-in-suspend;
473 vdd_cpu_lit_s0: dcdc-reg2 {
474 regulator-name = "vdd_cpu_lit_s0";
475 regulator-always-on;
476 regulator-boot-on;
477 regulator-min-microvolt = <550000>;
478 regulator-max-microvolt = <950000>;
479 regulator-ramp-delay = <12500>;
481 regulator-state-mem {
482 regulator-off-in-suspend;
486 vdd_log_s0: dcdc-reg3 {
487 regulator-name = "vdd_log_s0";
488 regulator-always-on;
489 regulator-boot-on;
490 regulator-min-microvolt = <675000>;
491 regulator-max-microvolt = <750000>;
492 regulator-ramp-delay = <12500>;
494 regulator-state-mem {
495 regulator-off-in-suspend;
496 regulator-suspend-microvolt = <750000>;
500 vdd_vdenc_s0: dcdc-reg4 {
501 regulator-name = "vdd_vdenc_s0";
502 regulator-always-on;
503 regulator-boot-on;
504 regulator-min-microvolt = <550000>;
505 regulator-max-microvolt = <950000>;
506 regulator-ramp-delay = <12500>;
508 regulator-state-mem {
509 regulator-off-in-suspend;
513 vdd_ddr_s0: dcdc-reg5 {
514 regulator-name = "vdd_ddr_s0";
515 regulator-always-on;
516 regulator-boot-on;
517 regulator-min-microvolt = <675000>;
518 regulator-max-microvolt = <900000>;
519 regulator-ramp-delay = <12500>;
521 regulator-state-mem {
522 regulator-off-in-suspend;
523 regulator-suspend-microvolt = <850000>;
527 vdd2_ddr_s3: dcdc-reg6 {
528 regulator-name = "vdd2_ddr_s3";
529 regulator-always-on;
530 regulator-boot-on;
532 regulator-state-mem {
533 regulator-on-in-suspend;
537 vcc_2v0_pldo_s3: dcdc-reg7 {
538 regulator-name = "vcc_2v0_pldo_s3";
539 regulator-always-on;
540 regulator-boot-on;
541 regulator-min-microvolt = <2000000>;
542 regulator-max-microvolt = <2000000>;
543 regulator-ramp-delay = <12500>;
545 regulator-state-mem {
546 regulator-on-in-suspend;
547 regulator-suspend-microvolt = <2000000>;
551 vcc_3v3_s3: dcdc-reg8 {
552 regulator-name = "vcc_3v3_s3";
553 regulator-always-on;
554 regulator-boot-on;
555 regulator-min-microvolt = <3300000>;
556 regulator-max-microvolt = <3300000>;
558 regulator-state-mem {
559 regulator-on-in-suspend;
560 regulator-suspend-microvolt = <3300000>;
564 vddq_ddr_s0: dcdc-reg9 {
565 regulator-name = "vddq_ddr_s0";
566 regulator-always-on;
567 regulator-boot-on;
569 regulator-state-mem {
570 regulator-off-in-suspend;
574 vcc_1v8_s3: dcdc-reg10 {
575 regulator-name = "vcc_1v8_s3";
576 regulator-always-on;
577 regulator-boot-on;
578 regulator-min-microvolt = <1800000>;
579 regulator-max-microvolt = <1800000>;
581 regulator-state-mem {
582 regulator-on-in-suspend;
583 regulator-suspend-microvolt = <1800000>;
587 vcca_1v8_s0: pldo-reg1 {
588 regulator-name = "vcca_1v8_s0";
589 regulator-always-on;
590 regulator-boot-on;
591 regulator-min-microvolt = <1800000>;
592 regulator-max-microvolt = <1800000>;
594 regulator-state-mem {
595 regulator-off-in-suspend;
599 vcc_1v8_s0: pldo-reg2 {
600 regulator-name = "vcc_1v8_s0";
601 regulator-always-on;
602 regulator-boot-on;
603 regulator-min-microvolt = <1800000>;
604 regulator-max-microvolt = <1800000>;
606 regulator-state-mem {
607 regulator-off-in-suspend;
608 regulator-suspend-microvolt = <1800000>;
612 vdda_1v2_s0: pldo-reg3 {
613 regulator-name = "vdda_1v2_s0";
614 regulator-always-on;
615 regulator-boot-on;
616 regulator-min-microvolt = <1200000>;
617 regulator-max-microvolt = <1200000>;
619 regulator-state-mem {
620 regulator-off-in-suspend;
624 vcca_3v3_s0: pldo-reg4 {
625 regulator-name = "vcca_3v3_s0";
626 regulator-always-on;
627 regulator-boot-on;
628 regulator-min-microvolt = <3300000>;
629 regulator-max-microvolt = <3300000>;
630 regulator-ramp-delay = <12500>;
632 regulator-state-mem {
633 regulator-off-in-suspend;
637 vccio_sd_s0: pldo-reg5 {
638 regulator-name = "vccio_sd_s0";
639 regulator-always-on;
640 regulator-boot-on;
641 regulator-min-microvolt = <1800000>;
642 regulator-max-microvolt = <3300000>;
643 regulator-ramp-delay = <12500>;
645 regulator-state-mem {
646 regulator-off-in-suspend;
650 pldo6_s3: pldo-reg6 {
651 regulator-name = "pldo6_s3";
652 regulator-always-on;
653 regulator-boot-on;
654 regulator-min-microvolt = <1800000>;
655 regulator-max-microvolt = <1800000>;
657 regulator-state-mem {
658 regulator-on-in-suspend;
659 regulator-suspend-microvolt = <1800000>;
663 vdd_0v75_s3: nldo-reg1 {
664 regulator-name = "vdd_0v75_s3";
665 regulator-always-on;
666 regulator-boot-on;
667 regulator-min-microvolt = <750000>;
668 regulator-max-microvolt = <750000>;
670 regulator-state-mem {
671 regulator-on-in-suspend;
672 regulator-suspend-microvolt = <750000>;
676 vdda_ddr_pll_s0: nldo-reg2 {
677 regulator-name = "vdda_ddr_pll_s0";
678 regulator-always-on;
679 regulator-boot-on;
680 regulator-min-microvolt = <850000>;
681 regulator-max-microvolt = <850000>;
683 regulator-state-mem {
684 regulator-off-in-suspend;
685 regulator-suspend-microvolt = <850000>;
689 vdda_0v75_s0: nldo-reg3 {
690 regulator-name = "vdda_0v75_s0";
691 regulator-always-on;
692 regulator-boot-on;
693 regulator-min-microvolt = <750000>;
694 regulator-max-microvolt = <750000>;
696 regulator-state-mem {
697 regulator-off-in-suspend;
701 vdda_0v85_s0: nldo-reg4 {
702 regulator-name = "vdda_0v85_s0";
703 regulator-always-on;
704 regulator-boot-on;
705 regulator-min-microvolt = <850000>;
706 regulator-max-microvolt = <850000>;
708 regulator-state-mem {
709 regulator-off-in-suspend;
713 vdd_0v75_s0: nldo-reg5 {
714 regulator-name = "vdd_0v75_s0";
715 regulator-always-on;
716 regulator-boot-on;
717 regulator-min-microvolt = <750000>;
718 regulator-max-microvolt = <750000>;
720 regulator-state-mem {
721 regulator-off-in-suspend;
734 pinctrl-0 = <&uart2m2_xfer>;
737 /* Mule-ATtiny UPDI */
739 pinctrl-0 = <&uart4m2_xfer>;