Lines Matching +full:rcar +full:- +full:gen4 +full:- +full:ethertsn
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the R-Car V4H (R8A779G0) SoC
8 #include <dt-bindings/clock/r8a779g0-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a779g0-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
17 /* External Audio clock - to be overridden by boards that provide it */
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
21 clock-frequency = <0>;
24 /* External CAN clock - to be overridden by boards that provide it */
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <0>;
31 cluster0_opp: opp-table-0 {
32 compatible = "operating-points-v2";
33 opp-shared;
35 opp-500000000 {
36 opp-hz = /bits/ 64 <500000000>;
37 opp-microvolt = <825000>;
38 clock-latency-ns = <500000>;
40 opp-1000000000 {
41 opp-hz = /bits/ 64 <1000000000>;
42 opp-microvolt = <825000>;
43 clock-latency-ns = <500000>;
45 opp-1500000000 {
46 opp-hz = /bits/ 64 <1500000000>;
47 opp-microvolt = <825000>;
48 clock-latency-ns = <500000>;
50 opp-1700000000 {
51 opp-hz = /bits/ 64 <1700000000>;
52 opp-microvolt = <825000>;
53 clock-latency-ns = <500000>;
54 opp-suspend;
56 opp-1800000000 {
57 opp-hz = /bits/ 64 <1800000000>;
58 opp-microvolt = <880000>;
59 clock-latency-ns = <500000>;
60 turbo-mode;
65 #address-cells = <1>;
66 #size-cells = <0>;
68 cpu-map {
89 compatible = "arm,cortex-a76";
92 power-domains = <&sysc R8A779G0_PD_A1E0D0C0>;
93 next-level-cache = <&L3_CA76_0>;
94 enable-method = "psci";
95 cpu-idle-states = <&CPU_SLEEP_0>;
97 operating-points-v2 = <&cluster0_opp>;
101 compatible = "arm,cortex-a76";
104 power-domains = <&sysc R8A779G0_PD_A1E0D0C1>;
105 next-level-cache = <&L3_CA76_0>;
106 enable-method = "psci";
107 cpu-idle-states = <&CPU_SLEEP_0>;
109 operating-points-v2 = <&cluster0_opp>;
113 compatible = "arm,cortex-a76";
116 power-domains = <&sysc R8A779G0_PD_A1E0D1C0>;
117 next-level-cache = <&L3_CA76_1>;
118 enable-method = "psci";
119 cpu-idle-states = <&CPU_SLEEP_0>;
121 operating-points-v2 = <&cluster0_opp>;
125 compatible = "arm,cortex-a76";
128 power-domains = <&sysc R8A779G0_PD_A1E0D1C1>;
129 next-level-cache = <&L3_CA76_1>;
130 enable-method = "psci";
131 cpu-idle-states = <&CPU_SLEEP_0>;
133 operating-points-v2 = <&cluster0_opp>;
136 idle-states {
137 entry-method = "psci";
139 CPU_SLEEP_0: cpu-sleep-0 {
140 compatible = "arm,idle-state";
141 arm,psci-suspend-param = <0x0010000>;
142 local-timer-stop;
143 entry-latency-us = <400>;
144 exit-latency-us = <500>;
145 min-residency-us = <4000>;
149 L3_CA76_0: cache-controller-0 {
151 power-domains = <&sysc R8A779G0_PD_A2E0D0>;
152 cache-unified;
153 cache-level = <3>;
156 L3_CA76_1: cache-controller-1 {
158 power-domains = <&sysc R8A779G0_PD_A2E0D1>;
159 cache-unified;
160 cache-level = <3>;
165 compatible = "fixed-clock";
166 #clock-cells = <0>;
168 clock-frequency = <0>;
169 bootph-all;
173 compatible = "fixed-clock";
174 #clock-cells = <0>;
176 clock-frequency = <0>;
177 bootph-all;
180 pcie0_clkref: pcie0-clkref {
181 compatible = "fixed-clock";
182 #clock-cells = <0>;
184 clock-frequency = <0>;
187 pcie1_clkref: pcie1-clkref {
188 compatible = "fixed-clock";
189 #clock-cells = <0>;
191 clock-frequency = <0>;
195 compatible = "arm,cortex-a76-pmu";
196 interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
200 compatible = "arm,psci-1.0", "arm,psci-0.2";
204 /* External SCIF clocks - to be overridden by boards that provide them */
206 compatible = "fixed-clock";
207 #clock-cells = <0>;
208 clock-frequency = <0>;
212 compatible = "fixed-clock";
213 #clock-cells = <0>;
214 clock-frequency = <0>;
218 compatible = "simple-bus";
219 interrupt-parent = <&gic>;
220 bootph-all;
222 #address-cells = <2>;
223 #size-cells = <2>;
227 compatible = "renesas,r8a779g0-wdt",
228 "renesas,rcar-gen4-wdt";
232 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
238 compatible = "renesas,pfc-r8a779g0";
244 bootph-all;
248 compatible = "renesas,gpio-r8a779g0",
249 "renesas,rcar-gen4-gpio";
253 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
255 gpio-controller;
256 #gpio-cells = <2>;
257 gpio-ranges = <&pfc 0 0 19>;
258 interrupt-controller;
259 #interrupt-cells = <2>;
263 compatible = "renesas,gpio-r8a779g0",
264 "renesas,rcar-gen4-gpio";
268 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
270 gpio-controller;
271 #gpio-cells = <2>;
272 gpio-ranges = <&pfc 0 32 29>;
273 interrupt-controller;
274 #interrupt-cells = <2>;
278 compatible = "renesas,gpio-r8a779g0",
279 "renesas,rcar-gen4-gpio";
283 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
285 gpio-controller;
286 #gpio-cells = <2>;
287 gpio-ranges = <&pfc 0 64 20>;
288 interrupt-controller;
289 #interrupt-cells = <2>;
293 compatible = "renesas,gpio-r8a779g0",
294 "renesas,rcar-gen4-gpio";
298 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
300 gpio-controller;
301 #gpio-cells = <2>;
302 gpio-ranges = <&pfc 0 96 30>;
303 interrupt-controller;
304 #interrupt-cells = <2>;
308 compatible = "renesas,gpio-r8a779g0",
309 "renesas,rcar-gen4-gpio";
313 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
315 gpio-controller;
316 #gpio-cells = <2>;
317 gpio-ranges = <&pfc 0 128 25>;
318 interrupt-controller;
319 #interrupt-cells = <2>;
323 compatible = "renesas,gpio-r8a779g0",
324 "renesas,rcar-gen4-gpio";
328 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
330 gpio-controller;
331 #gpio-cells = <2>;
332 gpio-ranges = <&pfc 0 160 21>;
333 interrupt-controller;
334 #interrupt-cells = <2>;
338 compatible = "renesas,gpio-r8a779g0",
339 "renesas,rcar-gen4-gpio";
343 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
345 gpio-controller;
346 #gpio-cells = <2>;
347 gpio-ranges = <&pfc 0 192 21>;
348 interrupt-controller;
349 #interrupt-cells = <2>;
353 compatible = "renesas,gpio-r8a779g0",
354 "renesas,rcar-gen4-gpio";
358 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
360 gpio-controller;
361 #gpio-cells = <2>;
362 gpio-ranges = <&pfc 0 224 21>;
363 interrupt-controller;
364 #interrupt-cells = <2>;
368 compatible = "renesas,gpio-r8a779g0",
369 "renesas,rcar-gen4-gpio";
373 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
375 gpio-controller;
376 #gpio-cells = <2>;
377 gpio-ranges = <&pfc 0 256 14>;
378 interrupt-controller;
379 #interrupt-cells = <2>;
383 compatible = "renesas,r8a779g0-cmt0",
384 "renesas,rcar-gen4-cmt0";
389 clock-names = "fck";
390 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
396 compatible = "renesas,r8a779g0-cmt1",
397 "renesas,rcar-gen4-cmt1";
408 clock-names = "fck";
409 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
415 compatible = "renesas,r8a779g0-cmt1",
416 "renesas,rcar-gen4-cmt1";
427 clock-names = "fck";
428 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
434 compatible = "renesas,r8a779g0-cmt1",
435 "renesas,rcar-gen4-cmt1";
446 clock-names = "fck";
447 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
452 cpg: clock-controller@e6150000 {
453 compatible = "renesas,r8a779g0-cpg-mssr";
456 clock-names = "extal", "extalr";
457 #clock-cells = <2>;
458 #power-domain-cells = <0>;
459 #reset-cells = <1>;
460 bootph-all;
463 rst: reset-controller@e6160000 {
464 compatible = "renesas,r8a779g0-rst";
466 bootph-all;
469 sysc: system-controller@e6180000 {
470 compatible = "renesas,r8a779g0-sysc";
472 #power-domain-cells = <1>;
476 compatible = "renesas,r8a779g0-thermal";
482 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
484 #thermal-sensor-cells = <1>;
488 compatible = "renesas,r8a779g0-otp";
492 intc_ex: interrupt-controller@e61c0000 {
493 compatible = "renesas,intc-ex-r8a779g0", "renesas,irqc";
494 #interrupt-cells = <2>;
495 interrupt-controller;
504 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
509 compatible = "renesas,tmu-r8a779g0", "renesas,tmu";
514 interrupt-names = "tuni0", "tuni1", "tuni2";
516 clock-names = "fck";
517 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
523 compatible = "renesas,tmu-r8a779g0", "renesas,tmu";
529 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
531 clock-names = "fck";
532 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
538 compatible = "renesas,tmu-r8a779g0", "renesas,tmu";
544 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
546 clock-names = "fck";
547 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
553 compatible = "renesas,tmu-r8a779g0", "renesas,tmu";
559 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
561 clock-names = "fck";
562 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
568 compatible = "renesas,tmu-r8a779g0", "renesas,tmu";
574 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
576 clock-names = "fck";
577 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
583 compatible = "renesas,r8a779g0-ethertsn", "renesas,rcar-gen4-ethertsn";
586 reg-names = "tsnes", "gptp";
589 interrupt-names = "tx", "rx";
591 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
597 compatible = "renesas,i2c-r8a779g0",
598 "renesas,rcar-gen4-i2c";
604 dma-names = "tx", "rx", "tx", "rx";
605 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
607 i2c-scl-internal-delay-ns = <110>;
608 #address-cells = <1>;
609 #size-cells = <0>;
614 compatible = "renesas,i2c-r8a779g0",
615 "renesas,rcar-gen4-i2c";
621 dma-names = "tx", "rx", "tx", "rx";
622 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
624 i2c-scl-internal-delay-ns = <110>;
625 #address-cells = <1>;
626 #size-cells = <0>;
631 compatible = "renesas,i2c-r8a779g0",
632 "renesas,rcar-gen4-i2c";
638 dma-names = "tx", "rx", "tx", "rx";
639 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
641 i2c-scl-internal-delay-ns = <110>;
642 #address-cells = <1>;
643 #size-cells = <0>;
648 compatible = "renesas,i2c-r8a779g0",
649 "renesas,rcar-gen4-i2c";
655 dma-names = "tx", "rx", "tx", "rx";
656 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
658 i2c-scl-internal-delay-ns = <110>;
659 #address-cells = <1>;
660 #size-cells = <0>;
665 compatible = "renesas,i2c-r8a779g0",
666 "renesas,rcar-gen4-i2c";
670 dma-names = "tx", "rx", "tx", "rx";
673 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
675 i2c-scl-internal-delay-ns = <110>;
676 #address-cells = <1>;
677 #size-cells = <0>;
682 compatible = "renesas,i2c-r8a779g0",
683 "renesas,rcar-gen4-i2c";
689 dma-names = "tx", "rx", "tx", "rx";
690 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
692 i2c-scl-internal-delay-ns = <110>;
693 #address-cells = <1>;
694 #size-cells = <0>;
699 compatible = "renesas,hscif-r8a779g0",
700 "renesas,rcar-gen4-hscif", "renesas,hscif";
706 clock-names = "fck", "brg_int", "scif_clk";
709 dma-names = "tx", "rx", "tx", "rx";
710 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
716 compatible = "renesas,hscif-r8a779g0",
717 "renesas,rcar-gen4-hscif", "renesas,hscif";
723 clock-names = "fck", "brg_int", "scif_clk";
726 dma-names = "tx", "rx", "tx", "rx";
727 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
733 compatible = "renesas,hscif-r8a779g0",
734 "renesas,rcar-gen4-hscif", "renesas,hscif";
740 clock-names = "fck", "brg_int", "scif_clk";
743 dma-names = "tx", "rx", "tx", "rx";
744 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
750 compatible = "renesas,hscif-r8a779g0",
751 "renesas,rcar-gen4-hscif", "renesas,hscif";
757 clock-names = "fck", "brg_int", "scif_clk";
760 dma-names = "tx", "rx", "tx", "rx";
761 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
767 compatible = "renesas,r8a779g0-pcie",
768 "renesas,rcar-gen4-pcie";
773 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "config";
778 interrupt-names = "msi", "dma", "sft_ce", "app";
780 clock-names = "core", "ref";
781 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
783 reset-names = "pwr";
784 max-link-speed = <4>;
785 num-lanes = <2>;
786 #address-cells = <3>;
787 #size-cells = <2>;
788 bus-range = <0x00 0xff>;
792 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
793 #interrupt-cells = <1>;
794 interrupt-map-mask = <0 0 0 7>;
795 interrupt-map = <0 0 0 1 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
799 snps,enable-cdm-check;
804 compatible = "renesas,r8a779g0-pcie",
805 "renesas,rcar-gen4-pcie";
810 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "config";
815 interrupt-names = "msi", "dma", "sft_ce", "app";
817 clock-names = "core", "ref";
818 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
820 reset-names = "pwr";
821 max-link-speed = <4>;
822 num-lanes = <2>;
823 #address-cells = <3>;
824 #size-cells = <2>;
825 bus-range = <0x00 0xff>;
829 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
830 #interrupt-cells = <1>;
831 interrupt-map-mask = <0 0 0 7>;
832 interrupt-map = <0 0 0 1 &gic GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>,
836 snps,enable-cdm-check;
840 pciec0_ep: pcie-ep@e65d0000 {
841 compatible = "renesas,r8a779g0-pcie-ep",
842 "renesas,rcar-gen4-pcie-ep";
847 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "addr_space";
851 interrupt-names = "dma", "sft_ce", "app";
853 clock-names = "core", "ref";
854 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
856 reset-names = "pwr";
857 max-link-speed = <4>;
858 num-lanes = <2>;
859 max-functions = /bits/ 8 <2>;
863 pciec1_ep: pcie-ep@e65d8000 {
864 compatible = "renesas,r8a779g0-pcie-ep",
865 "renesas,rcar-gen4-pcie-ep";
870 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "addr_space";
874 interrupt-names = "dma", "sft_ce", "app";
876 clock-names = "core", "ref";
877 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
879 reset-names = "pwr";
880 max-link-speed = <4>;
881 num-lanes = <2>;
882 max-functions = /bits/ 8 <2>;
887 compatible = "renesas,r8a779g0-canfd",
888 "renesas,rcar-gen4-canfd";
892 interrupt-names = "ch_int", "g_int";
896 clock-names = "fck", "canfd", "can_clk";
897 assigned-clocks = <&cpg CPG_CORE R8A779G0_CLK_CANFD>;
898 assigned-clock-rates = <80000000>;
899 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
937 compatible = "renesas,etheravb-r8a779g0",
938 "renesas,etheravb-rcar-gen4";
965 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4",
972 clock-names = "fck";
973 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
975 phy-mode = "rgmii";
976 rx-internal-delay-ps = <0>;
977 tx-internal-delay-ps = <0>;
983 compatible = "renesas,etheravb-r8a779g0",
984 "renesas,etheravb-rcar-gen4";
1011 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4",
1018 clock-names = "fck";
1019 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1021 phy-mode = "rgmii";
1022 rx-internal-delay-ps = <0>;
1023 tx-internal-delay-ps = <0>;
1029 compatible = "renesas,etheravb-r8a779g0",
1030 "renesas,etheravb-rcar-gen4";
1057 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4",
1064 clock-names = "fck";
1065 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1067 phy-mode = "rgmii";
1068 rx-internal-delay-ps = <0>;
1069 tx-internal-delay-ps = <0>;
1075 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
1077 #pwm-cells = <2>;
1079 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1085 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
1087 #pwm-cells = <2>;
1089 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1095 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
1097 #pwm-cells = <2>;
1099 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1105 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
1107 #pwm-cells = <2>;
1109 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1115 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
1117 #pwm-cells = <2>;
1119 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1125 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
1127 #pwm-cells = <2>;
1129 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1135 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
1137 #pwm-cells = <2>;
1139 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1145 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
1147 #pwm-cells = <2>;
1149 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1155 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
1157 #pwm-cells = <2>;
1159 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1165 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
1167 #pwm-cells = <2>;
1169 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1175 compatible = "renesas,scif-r8a779g0",
1176 "renesas,rcar-gen4-scif", "renesas,scif";
1182 clock-names = "fck", "brg_int", "scif_clk";
1185 dma-names = "tx", "rx", "tx", "rx";
1186 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1192 compatible = "renesas,scif-r8a779g0",
1193 "renesas,rcar-gen4-scif", "renesas,scif";
1199 clock-names = "fck", "brg_int", "scif_clk";
1202 dma-names = "tx", "rx", "tx", "rx";
1203 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1209 compatible = "renesas,scif-r8a779g0",
1210 "renesas,rcar-gen4-scif", "renesas,scif";
1216 clock-names = "fck", "brg_int", "scif_clk";
1219 dma-names = "tx", "rx", "tx", "rx";
1220 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1226 compatible = "renesas,scif-r8a779g0",
1227 "renesas,rcar-gen4-scif", "renesas,scif";
1233 clock-names = "fck", "brg_int", "scif_clk";
1236 dma-names = "tx", "rx", "tx", "rx";
1237 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1243 compatible = "renesas,tpu-r8a779g0", "renesas,tpu";
1247 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1249 #pwm-cells = <3>;
1254 compatible = "renesas,msiof-r8a779g0",
1255 "renesas,rcar-gen4-msiof";
1261 dma-names = "tx", "rx", "tx", "rx";
1262 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1264 #address-cells = <1>;
1265 #size-cells = <0>;
1270 compatible = "renesas,msiof-r8a779g0",
1271 "renesas,rcar-gen4-msiof";
1277 dma-names = "tx", "rx", "tx", "rx";
1278 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1280 #address-cells = <1>;
1281 #size-cells = <0>;
1286 compatible = "renesas,msiof-r8a779g0",
1287 "renesas,rcar-gen4-msiof";
1293 dma-names = "tx", "rx", "tx", "rx";
1294 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1296 #address-cells = <1>;
1297 #size-cells = <0>;
1302 compatible = "renesas,msiof-r8a779g0",
1303 "renesas,rcar-gen4-msiof";
1309 dma-names = "tx", "rx", "tx", "rx";
1310 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1312 #address-cells = <1>;
1313 #size-cells = <0>;
1318 compatible = "renesas,msiof-r8a779g0",
1319 "renesas,rcar-gen4-msiof";
1325 dma-names = "tx", "rx", "tx", "rx";
1326 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1328 #address-cells = <1>;
1329 #size-cells = <0>;
1334 compatible = "renesas,msiof-r8a779g0",
1335 "renesas,rcar-gen4-msiof";
1341 dma-names = "tx", "rx", "tx", "rx";
1342 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1344 #address-cells = <1>;
1345 #size-cells = <0>;
1350 compatible = "renesas,vin-r8a779g0",
1351 "renesas,rcar-gen4-vin";
1355 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1361 #address-cells = <1>;
1362 #size-cells = <0>;
1365 #address-cells = <1>;
1366 #size-cells = <0>;
1372 remote-endpoint = <&isp0vin00>;
1379 compatible = "renesas,vin-r8a779g0",
1380 "renesas,rcar-gen4-vin";
1384 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1390 #address-cells = <1>;
1391 #size-cells = <0>;
1394 #address-cells = <1>;
1395 #size-cells = <0>;
1401 remote-endpoint = <&isp0vin01>;
1408 compatible = "renesas,vin-r8a779g0",
1409 "renesas,rcar-gen4-vin";
1413 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1419 #address-cells = <1>;
1420 #size-cells = <0>;
1423 #address-cells = <1>;
1424 #size-cells = <0>;
1430 remote-endpoint = <&isp0vin02>;
1437 compatible = "renesas,vin-r8a779g0",
1438 "renesas,rcar-gen4-vin";
1442 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1448 #address-cells = <1>;
1449 #size-cells = <0>;
1452 #address-cells = <1>;
1453 #size-cells = <0>;
1459 remote-endpoint = <&isp0vin03>;
1466 compatible = "renesas,vin-r8a779g0",
1467 "renesas,rcar-gen4-vin";
1471 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1477 #address-cells = <1>;
1478 #size-cells = <0>;
1481 #address-cells = <1>;
1482 #size-cells = <0>;
1488 remote-endpoint = <&isp0vin04>;
1495 compatible = "renesas,vin-r8a779g0",
1496 "renesas,rcar-gen4-vin";
1500 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1506 #address-cells = <1>;
1507 #size-cells = <0>;
1510 #address-cells = <1>;
1511 #size-cells = <0>;
1517 remote-endpoint = <&isp0vin05>;
1524 compatible = "renesas,vin-r8a779g0",
1525 "renesas,rcar-gen4-vin";
1529 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1535 #address-cells = <1>;
1536 #size-cells = <0>;
1539 #address-cells = <1>;
1540 #size-cells = <0>;
1546 remote-endpoint = <&isp0vin06>;
1553 compatible = "renesas,vin-r8a779g0",
1554 "renesas,rcar-gen4-vin";
1558 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1564 #address-cells = <1>;
1565 #size-cells = <0>;
1568 #address-cells = <1>;
1569 #size-cells = <0>;
1575 remote-endpoint = <&isp0vin07>;
1582 compatible = "renesas,vin-r8a779g0",
1583 "renesas,rcar-gen4-vin";
1587 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1593 #address-cells = <1>;
1594 #size-cells = <0>;
1597 #address-cells = <1>;
1598 #size-cells = <0>;
1604 remote-endpoint = <&isp1vin08>;
1611 compatible = "renesas,vin-r8a779g0",
1612 "renesas,rcar-gen4-vin";
1616 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1622 #address-cells = <1>;
1623 #size-cells = <0>;
1626 #address-cells = <1>;
1627 #size-cells = <0>;
1633 remote-endpoint = <&isp1vin09>;
1640 compatible = "renesas,vin-r8a779g0",
1641 "renesas,rcar-gen4-vin";
1645 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1651 #address-cells = <1>;
1652 #size-cells = <0>;
1655 #address-cells = <1>;
1656 #size-cells = <0>;
1662 remote-endpoint = <&isp1vin10>;
1669 compatible = "renesas,vin-r8a779g0",
1670 "renesas,rcar-gen4-vin";
1674 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1680 #address-cells = <1>;
1681 #size-cells = <0>;
1684 #address-cells = <1>;
1685 #size-cells = <0>;
1691 remote-endpoint = <&isp1vin11>;
1698 compatible = "renesas,vin-r8a779g0",
1699 "renesas,rcar-gen4-vin";
1703 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1709 #address-cells = <1>;
1710 #size-cells = <0>;
1713 #address-cells = <1>;
1714 #size-cells = <0>;
1720 remote-endpoint = <&isp1vin12>;
1727 compatible = "renesas,vin-r8a779g0",
1728 "renesas,rcar-gen4-vin";
1732 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1738 #address-cells = <1>;
1739 #size-cells = <0>;
1742 #address-cells = <1>;
1743 #size-cells = <0>;
1749 remote-endpoint = <&isp1vin13>;
1756 compatible = "renesas,vin-r8a779g0",
1757 "renesas,rcar-gen4-vin";
1761 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1767 #address-cells = <1>;
1768 #size-cells = <0>;
1771 #address-cells = <1>;
1772 #size-cells = <0>;
1778 remote-endpoint = <&isp1vin14>;
1785 compatible = "renesas,vin-r8a779g0",
1786 "renesas,rcar-gen4-vin";
1790 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1796 #address-cells = <1>;
1797 #size-cells = <0>;
1800 #address-cells = <1>;
1801 #size-cells = <0>;
1807 remote-endpoint = <&isp1vin15>;
1813 dmac0: dma-controller@e7350000 {
1814 compatible = "renesas,dmac-r8a779g0",
1815 "renesas,rcar-gen4-dmac";
1835 interrupt-names = "error",
1841 clock-names = "fck";
1842 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1844 #dma-cells = <1>;
1845 dma-channels = <16>;
1856 dmac1: dma-controller@e7351000 {
1857 compatible = "renesas,dmac-r8a779g0",
1858 "renesas,rcar-gen4-dmac";
1878 interrupt-names = "error",
1884 clock-names = "fck";
1885 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1887 #dma-cells = <1>;
1888 dma-channels = <16>;
1900 compatible = "renesas,rcar_sound-r8a779g0", "renesas,rcar_sound-gen4";
1905 reg-names = "adg", "ssiu", "ssi", "sdmc";
1908 clock-names = "ssiu.0", "ssi.0", "clkin";
1909 /* #clock-cells is fixed */
1910 #clock-cells = <0>;
1911 /* #sound-dai-cells is fixed */
1912 #sound-dai-cells = <0>;
1914 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1916 reset-names = "ssiu.0", "ssi.0";
1920 ssiu00: ssiu-0 {
1922 dma-names = "tx", "rx";
1924 ssiu01: ssiu-1 {
1926 dma-names = "tx", "rx";
1928 ssiu02: ssiu-2 {
1930 dma-names = "tx", "rx";
1932 ssiu03: ssiu-3 {
1934 dma-names = "tx", "rx";
1936 ssiu04: ssiu-4 {
1938 dma-names = "tx", "rx";
1940 ssiu05: ssiu-5 {
1942 dma-names = "tx", "rx";
1944 ssiu06: ssiu-6 {
1946 dma-names = "tx", "rx";
1948 ssiu07: ssiu-7 {
1950 dma-names = "tx", "rx";
1955 ssi0: ssi-0 {
1962 compatible = "renesas,sdhi-r8a779g0",
1963 "renesas,rcar-gen4-sdhi";
1968 clock-names = "core", "clkh";
1969 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1971 max-frequency = <200000000>;
1977 compatible = "renesas,r8a779g0-rpc-if",
1978 "renesas,rcar-gen4-rpc-if";
1982 reg-names = "regs", "dirmap", "wbuf";
1985 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1987 #address-cells = <1>;
1988 #size-cells = <0>;
1993 compatible = "renesas,ipmmu-r8a779g0",
1994 "renesas,rcar-gen4-ipmmu-vmsa";
1996 renesas,ipmmu-main = <&ipmmu_mm>;
1997 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1998 #iommu-cells = <1>;
2002 compatible = "renesas,ipmmu-r8a779g0",
2003 "renesas,rcar-gen4-ipmmu-vmsa";
2005 renesas,ipmmu-main = <&ipmmu_mm>;
2006 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2007 #iommu-cells = <1>;
2011 compatible = "renesas,ipmmu-r8a779g0",
2012 "renesas,rcar-gen4-ipmmu-vmsa";
2014 renesas,ipmmu-main = <&ipmmu_mm>;
2015 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2016 #iommu-cells = <1>;
2020 compatible = "renesas,ipmmu-r8a779g0",
2021 "renesas,rcar-gen4-ipmmu-vmsa";
2023 renesas,ipmmu-main = <&ipmmu_mm>;
2024 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2025 #iommu-cells = <1>;
2029 compatible = "renesas,ipmmu-r8a779g0",
2030 "renesas,rcar-gen4-ipmmu-vmsa";
2032 renesas,ipmmu-main = <&ipmmu_mm>;
2033 power-domains = <&sysc R8A779G0_PD_A3IR>;
2034 #iommu-cells = <1>;
2038 compatible = "renesas,ipmmu-r8a779g0",
2039 "renesas,rcar-gen4-ipmmu-vmsa";
2041 renesas,ipmmu-main = <&ipmmu_mm>;
2042 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2043 #iommu-cells = <1>;
2047 compatible = "renesas,ipmmu-r8a779g0",
2048 "renesas,rcar-gen4-ipmmu-vmsa";
2050 renesas,ipmmu-main = <&ipmmu_mm>;
2051 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2052 #iommu-cells = <1>;
2056 compatible = "renesas,ipmmu-r8a779g0",
2057 "renesas,rcar-gen4-ipmmu-vmsa";
2059 renesas,ipmmu-main = <&ipmmu_mm>;
2060 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2061 #iommu-cells = <1>;
2065 compatible = "renesas,ipmmu-r8a779g0",
2066 "renesas,rcar-gen4-ipmmu-vmsa";
2068 renesas,ipmmu-main = <&ipmmu_mm>;
2069 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2070 #iommu-cells = <1>;
2074 compatible = "renesas,ipmmu-r8a779g0",
2075 "renesas,rcar-gen4-ipmmu-vmsa";
2077 renesas,ipmmu-main = <&ipmmu_mm>;
2078 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2079 #iommu-cells = <1>;
2083 compatible = "renesas,ipmmu-r8a779g0",
2084 "renesas,rcar-gen4-ipmmu-vmsa";
2086 renesas,ipmmu-main = <&ipmmu_mm>;
2087 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2088 #iommu-cells = <1>;
2092 compatible = "renesas,ipmmu-r8a779g0",
2093 "renesas,rcar-gen4-ipmmu-vmsa";
2097 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2098 #iommu-cells = <1>;
2101 gic: interrupt-controller@f1000000 {
2102 compatible = "arm,gic-v3";
2103 #interrupt-cells = <3>;
2104 #address-cells = <0>;
2105 interrupt-controller;
2112 compatible = "renesas,r8a779g0-csi2";
2116 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2121 #address-cells = <1>;
2122 #size-cells = <0>;
2131 remote-endpoint = <&isp0csi40>;
2138 compatible = "renesas,r8a779g0-csi2";
2142 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2147 #address-cells = <1>;
2148 #size-cells = <0>;
2157 remote-endpoint = <&isp1csi41>;
2167 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2176 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2185 power-domains = <&sysc R8A779G0_PD_A3ISP0>;
2194 power-domains = <&sysc R8A779G0_PD_A3ISP1>;
2204 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2215 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2226 power-domains = <&sysc R8A779G0_PD_A3ISP0>;
2237 power-domains = <&sysc R8A779G0_PD_A3ISP1>;
2244 compatible = "renesas,du-r8a779g0";
2249 clock-names = "du.0";
2250 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2252 reset-names = "du.0";
2258 #address-cells = <1>;
2259 #size-cells = <0>;
2264 remote-endpoint = <&dsi0_in>;
2271 remote-endpoint = <&dsi1_in>;
2278 compatible = "renesas,r8a779g0-isp",
2279 "renesas,rcar-gen4-isp";
2283 power-domains = <&sysc R8A779G0_PD_A3ISP0>;
2288 #address-cells = <1>;
2289 #size-cells = <0>;
2292 #address-cells = <1>;
2293 #size-cells = <0>;
2299 remote-endpoint = <&csi40isp0>;
2306 remote-endpoint = <&vin00isp0>;
2313 remote-endpoint = <&vin01isp0>;
2320 remote-endpoint = <&vin02isp0>;
2327 remote-endpoint = <&vin03isp0>;
2334 remote-endpoint = <&vin04isp0>;
2341 remote-endpoint = <&vin05isp0>;
2348 remote-endpoint = <&vin06isp0>;
2355 remote-endpoint = <&vin07isp0>;
2362 compatible = "renesas,r8a779g0-isp",
2363 "renesas,rcar-gen4-isp";
2367 power-domains = <&sysc R8A779G0_PD_A3ISP1>;
2372 #address-cells = <1>;
2373 #size-cells = <0>;
2376 #address-cells = <1>;
2377 #size-cells = <0>;
2383 remote-endpoint = <&csi41isp1>;
2390 remote-endpoint = <&vin08isp1>;
2397 remote-endpoint = <&vin09isp1>;
2404 remote-endpoint = <&vin10isp1>;
2411 remote-endpoint = <&vin11isp1>;
2418 remote-endpoint = <&vin12isp1>;
2425 remote-endpoint = <&vin13isp1>;
2432 remote-endpoint = <&vin14isp1>;
2439 remote-endpoint = <&vin15isp1>;
2445 dsi0: dsi-encoder@fed80000 {
2446 compatible = "renesas,r8a779g0-dsi-csi2-tx";
2451 clock-names = "fck", "dsi", "pll";
2452 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2458 #address-cells = <1>;
2459 #size-cells = <0>;
2464 remote-endpoint = <&du_out_dsi0>;
2474 dsi1: dsi-encoder@fed90000 {
2475 compatible = "renesas,r8a779g0-dsi-csi2-tx";
2480 clock-names = "fck", "dsi", "pll";
2481 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2487 #address-cells = <1>;
2488 #size-cells = <0>;
2493 remote-endpoint = <&du_out_dsi1>;
2506 bootph-all;
2510 thermal-zones {
2511 sensor_thermal_cr52: sensor1-thermal {
2512 polling-delay-passive = <250>;
2513 polling-delay = <1000>;
2514 thermal-sensors = <&tsc 0>;
2517 sensor1_crit: sensor1-crit {
2525 sensor_thermal_cnn: sensor2-thermal {
2526 polling-delay-passive = <250>;
2527 polling-delay = <1000>;
2528 thermal-sensors = <&tsc 1>;
2531 sensor2_crit: sensor2-crit {
2539 sensor_thermal_ca76: sensor3-thermal {
2540 polling-delay-passive = <250>;
2541 polling-delay = <1000>;
2542 thermal-sensors = <&tsc 2>;
2545 sensor3_crit: sensor3-crit {
2553 sensor_thermal_ddr1: sensor4-thermal {
2554 polling-delay-passive = <250>;
2555 polling-delay = <1000>;
2556 thermal-sensors = <&tsc 3>;
2559 sensor4_crit: sensor4-crit {
2569 compatible = "arm,armv8-timer";
2570 interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
2575 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys",
2576 "hyp-virt";