Lines Matching full:pcc3

254 				clocks = <&pcc3 IMX8ULP_CLK_DMA1_MP>,
255 					<&pcc3 IMX8ULP_CLK_DMA1_CH0>, <&pcc3 IMX8ULP_CLK_DMA1_CH1>,
256 					<&pcc3 IMX8ULP_CLK_DMA1_CH2>, <&pcc3 IMX8ULP_CLK_DMA1_CH3>,
257 					<&pcc3 IMX8ULP_CLK_DMA1_CH4>, <&pcc3 IMX8ULP_CLK_DMA1_CH5>,
258 					<&pcc3 IMX8ULP_CLK_DMA1_CH6>, <&pcc3 IMX8ULP_CLK_DMA1_CH7>,
259 					<&pcc3 IMX8ULP_CLK_DMA1_CH8>, <&pcc3 IMX8ULP_CLK_DMA1_CH9>,
260 					<&pcc3 IMX8ULP_CLK_DMA1_CH10>, <&pcc3 IMX8ULP_CLK_DMA1_CH11>,
261 					<&pcc3 IMX8ULP_CLK_DMA1_CH12>, <&pcc3 IMX8ULP_CLK_DMA1_CH13>,
262 					<&pcc3 IMX8ULP_CLK_DMA1_CH14>, <&pcc3 IMX8ULP_CLK_DMA1_CH15>,
263 					<&pcc3 IMX8ULP_CLK_DMA1_CH16>, <&pcc3 IMX8ULP_CLK_DMA1_CH17>,
264 					<&pcc3 IMX8ULP_CLK_DMA1_CH18>, <&pcc3 IMX8ULP_CLK_DMA1_CH19>,
265 					<&pcc3 IMX8ULP_CLK_DMA1_CH20>, <&pcc3 IMX8ULP_CLK_DMA1_CH21>,
266 					<&pcc3 IMX8ULP_CLK_DMA1_CH22>, <&pcc3 IMX8ULP_CLK_DMA1_CH23>,
267 					<&pcc3 IMX8ULP_CLK_DMA1_CH24>, <&pcc3 IMX8ULP_CLK_DMA1_CH25>,
268 					<&pcc3 IMX8ULP_CLK_DMA1_CH26>, <&pcc3 IMX8ULP_CLK_DMA1_CH27>,
269 					<&pcc3 IMX8ULP_CLK_DMA1_CH28>, <&pcc3 IMX8ULP_CLK_DMA1_CH29>,
270 					<&pcc3 IMX8ULP_CLK_DMA1_CH30>, <&pcc3 IMX8ULP_CLK_DMA1_CH31>;
293 				clocks = <&pcc3 IMX8ULP_CLK_MU3_A>;
302 				clocks = <&pcc3 IMX8ULP_CLK_WDOG3>;
303 				assigned-clocks = <&pcc3 IMX8ULP_CLK_WDOG3>;
314 			pcc3: clock-controller@292d0000 {  label
315 				compatible = "fsl,imx8ulp-pcc3";
357 				clocks = <&pcc3 IMX8ULP_CLK_TPM5>,
358 					 <&pcc3 IMX8ULP_CLK_TPM5>;
367 				clocks = <&pcc3 IMX8ULP_CLK_LPI2C4>,
368 					 <&pcc3 IMX8ULP_CLK_LPI2C4>;
370 				assigned-clocks = <&pcc3 IMX8ULP_CLK_LPI2C4>;
380 				clocks = <&pcc3 IMX8ULP_CLK_LPI2C5>,
381 					 <&pcc3 IMX8ULP_CLK_LPI2C5>;
383 				assigned-clocks = <&pcc3 IMX8ULP_CLK_LPI2C5>;
393 				clocks = <&pcc3 IMX8ULP_CLK_LPUART4>;
402 				clocks = <&pcc3 IMX8ULP_CLK_LPUART5>;
413 				clocks = <&pcc3 IMX8ULP_CLK_LPSPI4>,
414 					 <&pcc3 IMX8ULP_CLK_LPSPI4>;
416 				assigned-clocks = <&pcc3 IMX8ULP_CLK_LPSPI4>;
428 				clocks = <&pcc3 IMX8ULP_CLK_LPSPI5>,
429 					 <&pcc3 IMX8ULP_CLK_LPSPI5>;
431 				assigned-clocks = <&pcc3 IMX8ULP_CLK_LPSPI5>;