Lines Matching +full:psci +full:- +full:0

1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
8 #include <dt-bindings/clock/samsung,exynos990.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #address-cells = <2>;
14 #size-cells = <1>;
16 interrupt-parent = <&gic>;
29 #address-cells = <1>;
30 #size-cells = <0>;
32 cpu-map {
72 cpu0: cpu@0 {
74 compatible = "arm,cortex-a55";
75 reg = <0x0>;
76 enable-method = "psci";
81 compatible = "arm,cortex-a55";
82 reg = <0x1>;
83 enable-method = "psci";
88 compatible = "arm,cortex-a55";
89 reg = <0x2>;
90 enable-method = "psci";
95 compatible = "arm,cortex-a55";
96 reg = <0x3>;
97 enable-method = "psci";
102 compatible = "arm,cortex-a76";
103 reg = <0x4>;
104 enable-method = "psci";
109 compatible = "arm,cortex-a76";
110 reg = <0x5>;
111 enable-method = "psci";
116 compatible = "samsung,mongoose-m5";
117 reg = <0x6>;
118 enable-method = "psci";
123 compatible = "samsung,mongoose-m5";
124 reg = <0x7>;
125 enable-method = "psci";
129 oscclk: clock-osc {
130 compatible = "fixed-clock";
131 #clock-cells = <0>;
132 clock-output-names = "oscclk";
135 pmu-a55 {
136 compatible = "arm,cortex-a55-pmu";
142 interrupt-affinity = <&cpu0>,
148 pmu-a76 {
149 compatible = "arm,cortex-a76-pmu";
153 interrupt-affinity = <&cpu4>,
157 pmu-mongoose-m5 {
158 compatible = "samsung,mongoose-pmu";
162 interrupt-affinity = <&cpu6>,
166 psci {
167 compatible = "arm,psci-0.2";
171 soc: soc@0 {
172 compatible = "simple-bus";
173 ranges = <0x0 0x0 0x0 0x20000000>;
175 #address-cells = <1>;
176 #size-cells = <1>;
179 compatible = "samsung,exynos990-chipid",
180 "samsung,exynos850-chipid";
181 reg = <0x10000000 0x100>;
184 cmu_peris: clock-controller@10020000 {
185 compatible = "samsung,exynos990-cmu-peris";
186 reg = <0x10020000 0x8000>;
187 #clock-cells = <1>;
191 clock-names = "oscclk", "bus";
195 compatible = "samsung,exynos990-mct",
196 "samsung,exynos4210-mct";
197 reg = <0x10040000 0x800>;
199 clock-names = "fin_pll", "mct";
214 gic: interrupt-controller@10101000 {
215 compatible = "arm,gic-400";
216 reg = <0x10101000 0x1000>,
217 <0x10102000 0x1000>,
218 <0x10104000 0x2000>,
219 <0x10106000 0x2000>;
220 #interrupt-cells = <3>;
221 interrupt-controller;
224 #address-cells = <0>;
225 #size-cells = <1>;
229 compatible = "samsung,exynos990-pinctrl";
230 reg = <0x10430000 0x1000>;
235 compatible = "samsung,exynos990-pinctrl";
236 reg = <0x10730000 0x1000>;
240 cmu_hsi0: clock-controller@10a00000 {
241 compatible = "samsung,exynos990-cmu-hsi0";
242 reg = <0x10a00000 0x8000>;
243 #clock-cells = <1>;
250 clock-names = "oscclk",
258 compatible = "samsung,exynos990-pinctrl";
259 reg = <0x13040000 0x1000>;
264 compatible = "samsung,exynos990-pinctrl";
265 reg = <0x13c30000 0x1000>;
270 compatible = "samsung,exynos990-pinctrl";
271 reg = <0x15580000 0x1000>;
275 compatible = "samsung,exynos990-pinctrl";
276 reg = <0x15850000 0x1000>;
278 wakeup-interrupt-controller {
279 compatible = "samsung,exynos990-wakeup-eint",
280 "samsung,exynos850-wakeup-eint",
281 "samsung,exynos7-wakeup-eint";
285 pmu_system_controller: system-controller@15860000 {
286 compatible = "samsung,exynos990-pmu",
287 "samsung,exynos7-pmu", "syscon";
288 reg = <0x15860000 0x10000>;
290 reboot: syscon-reboot {
291 compatible = "syscon-reboot";
293 offset = <0x3a00>; /* SWRESET */
294 mask = <0x2>; /* SWRESET_TRIGGER */
295 value = <0x2>;
300 compatible = "samsung,exynos990-pinctrl";
301 reg = <0x15c30000 0x1000>;
304 cmu_top: clock-controller@1a330000 {
305 compatible = "samsung,exynos990-cmu-top";
306 reg = <0x1a330000 0x8000>;
307 #clock-cells = <1>;
310 clock-names = "oscclk";
315 compatible = "arm,armv8-timer";
322 * Non-updatable, broken stock Samsung bootloader does not
325 clock-frequency = <26000000>;
329 #include "exynos990-pinctrl.dtsi"