dts/apple/t8011.dtsi

1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
16 	interrupt-parent = <&aic>;
17 	#address-cells = <2>;
18 	#size-cells = <2>;
20 	clkref: clock-ref {
21 		compatible = "fixed-clock";
22 		#clock-cells = <0>;
23 		clock-frequency = <24000000>;
24 		clock-output-names = "clkref";
28 		#address-cells = <2>;
29 		#size-cells = <0>;
31 		cpu0: cpu@0 {
32 			compatible = "apple,hurricane-zephyr";
34 			cpu-release-addr = <0 0>; /* To be filled by loader */
35 			operating-points-v2 = <&fusion_opp>;
36 			performance-domains = <&cpufreq>;
37 			enable-method = "spin-table";
38 			device_type = "cpu";
41 		cpu1: cpu@1 {
42 			compatible = "apple,hurricane-zephyr";
44 			cpu-release-addr = <0 0>; /* To be filled by loader */
45 			operating-points-v2 = <&fusion_opp>;
46 			performance-domains = <&cpufreq>;
47 			enable-method = "spin-table";
48 			device_type = "cpu";
51 		cpu2: cpu@2 {
52 			compatible = "apple,hurricane-zephyr";
54 			cpu-release-addr = <0 0>; /* To be filled by loader */
55 			operating-points-v2 = <&fusion_opp>;
56 			performance-domains = <&cpufreq>;
57 			enable-method = "spin-table";
58 			device_type = "cpu";
62 	fusion_opp: opp-table {
63 		compatible = "operating-points-v2";
67 		 * that use p-state transitions to switch between cores.
69 		 * The E-core frequencies are adjusted so performance scales
74 			opp-hz = /bits/ 64 <172000000>; /* 300 MHz, E-core */
75 			opp-level = <1>;
76 			clock-latency-ns = <12000>;
79 			opp-hz = /bits/ 64 <230000000>; /* 396 MHz, E-core */
80 			opp-level = <2>;
81 			clock-latency-ns = <135000>;
84 			opp-hz = /bits/ 64 <448000000>; /* 768 MHz, E-core */
85 			opp-level = <3>;
86 			clock-latency-ns = <105000>;
89 			opp-hz = /bits/ 64 <662000000>; /* 1152 MHz, E-core */
90 			opp-level = <4>;
91 			clock-latency-ns = <115000>;
94 			opp-hz = /bits/ 64 <804000000>;
95 			opp-level = <5>;
96 			clock-latency-ns = <122000>;
99 			opp-hz = /bits/ 64 <1140000000>;
100 			opp-level = <6>;
101 			clock-latency-ns = <120000>;
104 			opp-hz = /bits/ 64 <1548000000>;
105 			opp-level = <7>;
106 			clock-latency-ns = <125000>;
109 			opp-hz = /bits/ 64 <1956000000>;
110 			opp-level = <8>;
111 			clock-latency-ns = <135000>;
114 			opp-hz = /bits/ 64 <2316000000>;
115 			opp-level = <9>;
116 			clock-latency-ns = <140000>;
119 		/* Not available until CPU deep sleep is implemented */
121 			opp-hz = /bits/ 64 <2400000000>;
122 			opp-level = <10>;
123 			clock-latency-ns = <140000>;
124 			turbo-mode;
130 		compatible = "simple-bus";
131 		#address-cells = <2>;
132 		#size-cells = <2>;
133 		nonposted-mmio;
136 		cpufreq: performance-controller@202f20000 {
137 …compatible = "apple,t8010-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";
139 			#performance-domain-cells = <0>;
143 			compatible = "apple,s5l-uart";
145 			reg-io-width = <4>;
146 			interrupt-parent = <&aic>;
148 			/* Use the bootloader-enabled clocks for now. */
150 			clock-names = "uart", "clk_uart_baud0";
151 			power-domains = <&ps_uart0>;
155 		pmgr: power-management@20e000000 {
156 			compatible = "apple,t8010-pmgr", "apple,pmgr", "syscon", "simple-mfd";
157 			#address-cells = <1>;
158 			#size-cells = <1>;
163 		aic: interrupt-controller@20e100000 {
164 			compatible = "apple,t8010-aic", "apple,aic";
166 			#interrupt-cells = <3>;
167 			interrupt-controller;
168 			power-domains = <&ps_aic>;
172 			compatible = "apple,t8010-pinctrl", "apple,pinctrl";
174 			power-domains = <&ps_gpio>;
176 			gpio-controller;
177 			#gpio-cells = <2>;
178 			gpio-ranges = <&pinctrl_ap 0 0 219>;
181 			interrupt-controller;
182 			#interrupt-cells = <2>;
183 			interrupt-parent = <&aic>;
194 			compatible = "apple,t8010-pinctrl", "apple,pinctrl";
196 			power-domains = <&ps_aop_gpio>;
198 			gpio-controller;
199 			#gpio-cells = <2>;
200 			gpio-ranges = <&pinctrl_aop 0 0 42>;
203 			interrupt-controller;
204 			#interrupt-cells = <2>;
205 			interrupt-parent = <&aic>;
215 		pmgr_mini: power-management@210200000 {
216 			compatible = "apple,t8010-pmgr", "apple,pmgr", "syscon", "simple-mfd";
217 			#address-cells = <1>;
218 			#size-cells = <1>;
224 			compatible = "apple,t8010-wdt", "apple,wdt";
227 			interrupt-parent = <&aic>;
233 		compatible = "arm,armv8-timer";
234 		interrupt-parent = <&aic>;
235 		interrupt-names = "phys", "virt";
242 #include "t8011-pmgr.dtsi"