dts/apple/t7001.dtsi

1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/apple-aic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/pinctrl/apple.h>
15 	interrupt-parent = <&aic>;
16 	#address-cells = <2>;
17 	#size-cells = <2>;
23 	clkref: clock-ref {
24 		compatible = "fixed-clock";
25 		#clock-cells = <0>;
26 		clock-frequency = <24000000>;
27 		clock-output-names = "clkref";
31 		#address-cells = <2>;
32 		#size-cells = <0>;
34 		cpu0: cpu@0 {
37 			cpu-release-addr = <0 0>; /* To be filled in by loader */
38 			performance-domains = <&cpufreq>;
39 			operating-points-v2 = <&typhoon_opp>;
40 			enable-method = "spin-table";
41 			device_type = "cpu";
44 		cpu1: cpu@1 {
47 			cpu-release-addr = <0 0>; /* To be filled in by loader */
48 			performance-domains = <&cpufreq>;
49 			operating-points-v2 = <&typhoon_opp>;
50 			enable-method = "spin-table";
51 			device_type = "cpu";
54 		cpu2: cpu@2 {
57 			cpu-release-addr = <0 0>; /* To be filled by loader */
58 			performance-domains = <&cpufreq>;
59 			operating-points-v2 = <&typhoon_opp>;
60 			enable-method = "spin-table";
61 			device_type = "cpu";
65 	typhoon_opp: opp-table {
66 		compatible = "operating-points-v2";
69 			opp-hz = /bits/ 64 <300000000>;
70 			opp-level = <1>;
71 			clock-latency-ns = <300>;
74 			opp-hz = /bits/ 64 <396000000>;
75 			opp-level = <2>;
76 			clock-latency-ns = <49000>;
79 			opp-hz = /bits/ 64 <600000000>;
80 			opp-level = <3>;
81 			clock-latency-ns = <31000>;
84 			opp-hz = /bits/ 64 <840000000>;
85 			opp-level = <4>;
86 			clock-latency-ns = <32000>;
89 			opp-hz = /bits/ 64 <1128000000>;
90 			opp-level = <5>;
91 			clock-latency-ns = <32000>;
94 			opp-hz = /bits/ 64 <1392000000>;
95 			opp-level = <6>;
96 			clock-latency-ns = <37000>;
99 			opp-hz = /bits/ 64 <1512000000>;
100 			opp-level = <7>;
101 			clock-latency-ns = <41000>;
106 		compatible = "simple-bus";
107 		#address-cells = <2>;
108 		#size-cells = <2>;
109 		nonposted-mmio;
112 		cpufreq: performance-controller@202220000 {
113 			compatible = "apple,t7000-cluster-cpufreq", "apple,s5l8960x-cluster-cpufreq";
115 			#performance-domain-cells = <0>;
119 			compatible = "apple,s5l-uart";
121 			reg-io-width = <4>;
122 			interrupt-parent = <&aic>;
124 			/* Use the bootloader-enabled clocks for now. */
126 			clock-names = "uart", "clk_uart_baud0";
127 			power-domains = <&ps_uart0>;
131 		pmgr: power-management@20e000000 {
132 			compatible = "apple,t7000-pmgr", "apple,pmgr", "syscon", "simple-mfd";
133 			#address-cells = <1>;
134 			#size-cells = <1>;
140 			compatible = "apple,t7000-wdt", "apple,wdt";
143 			interrupt-parent = <&aic>;
147 		aic: interrupt-controller@20e100000 {
148 			compatible = "apple,t7000-aic", "apple,aic";
150 			#interrupt-cells = <3>;
151 			interrupt-controller;
152 			power-domains = <&ps_aic>;
156 			compatible = "apple,t7000-pinctrl", "apple,pinctrl";
158 			power-domains = <&ps_gpio>;
160 			gpio-controller;
161 			#gpio-cells = <2>;
162 			gpio-ranges = <&pinctrl 0 0 184>;
165 			interrupt-controller;
166 			#interrupt-cells = <2>;
167 			interrupt-parent = <&aic>;
179 		compatible = "arm,armv8-timer";
180 		interrupt-parent = <&aic>;
181 		interrupt-names = "phys", "virt";
188 #include "t7001-pmgr.dtsi"