dts/apple/t7000.dtsi

1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
8  * Based on Asahi Linux's M1 (t8103.dtsi) and Corellium's A10 efforts.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/apple-aic.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/pinctrl/apple.h>
17 	interrupt-parent = <&aic>;
18 	#address-cells = <2>;
19 	#size-cells = <2>;
21 	clkref: clock-ref {
22 		compatible = "fixed-clock";
23 		#clock-cells = <0>;
24 		clock-frequency = <24000000>;
25 		clock-output-names = "clkref";
29 		#address-cells = <2>;
30 		#size-cells = <0>;
35 			cpu-release-addr = <0 0>; /* To be filled in by loader */
36 			performance-domains = <&cpufreq>;
37 			operating-points-v2 = <&typhoon_opp>;
38 			enable-method = "spin-table";
45 			cpu-release-addr = <0 0>; /* To be filled in by loader */
46 			performance-domains = <&cpufreq>;
47 			operating-points-v2 = <&typhoon_opp>;
48 			enable-method = "spin-table";
53 	typhoon_opp: opp-table {
54 		compatible = "operating-points-v2";
57 			opp-hz = /bits/ 64 <300000000>;
58 			opp-level = <1>;
59 			clock-latency-ns = <300>;
62 			opp-hz = /bits/ 64 <396000000>;
63 			opp-level = <2>;
64 			clock-latency-ns = <50000>;
67 			opp-hz = /bits/ 64 <600000000>;
68 			opp-level = <3>;
69 			clock-latency-ns = <29000>;
72 			opp-hz = /bits/ 64 <840000000>;
73 			opp-level = <4>;
74 			clock-latency-ns = <29000>;
77 			opp-hz = /bits/ 64 <1128000000>;
78 			opp-level = <5>;
79 			clock-latency-ns = <36000>;
82 			opp-hz = /bits/ 64 <1392000000>;
83 			opp-level = <6>;
84 			clock-latency-ns = <42000>;
88 			opp-hz = /bits/ 64 <1512000000>;
89 			opp-level = <7>;
90 			clock-latency-ns = <49000>;
96 		compatible = "simple-bus";
97 		#address-cells = <2>;
98 		#size-cells = <2>;
99 		nonposted-mmio;
102 		cpufreq: performance-controller@202220000 {
103 			compatible = "apple,t7000-cluster-cpufreq", "apple,s5l8960x-cluster-cpufreq";
105 			#performance-domain-cells = <0>;
109 			compatible = "apple,s5l-uart";
111 			reg-io-width = <4>;
112 			interrupt-parent = <&aic>;
114 			/* Use the bootloader-enabled clocks for now. */
116 			clock-names = "uart", "clk_uart_baud0";
117 			power-domains = <&ps_uart0>;
122 			compatible = "apple,s5l-uart";
124 			reg-io-width = <4>;
125 			interrupt-parent = <&aic>;
127 			/* Use the bootloader-enabled clocks for now. */
129 			clock-names = "uart", "clk_uart_baud0";
130 			power-domains = <&ps_uart6>;
134 		pmgr: power-management@20e000000 {
135 			compatible = "apple,t7000-pmgr", "apple,pmgr", "syscon", "simple-mfd";
136 			#address-cells = <1>;
137 			#size-cells = <1>;
143 			compatible = "apple,t7000-wdt", "apple,wdt";
146 			interrupt-parent = <&aic>;
150 		aic: interrupt-controller@20e100000 {
151 			compatible = "apple,t7000-aic", "apple,aic";
153 			#interrupt-cells = <3>;
154 			interrupt-controller;
155 			power-domains = <&ps_aic>;
159 			compatible = "apple,t7000-dwi-bl", "apple,dwi-bl";
161 			power-domains = <&ps_dwi>;
166 			compatible = "apple,t7000-pinctrl", "apple,pinctrl";
168 			power-domains = <&ps_gpio>;
170 			gpio-controller;
171 			#gpio-cells = <2>;
172 			gpio-ranges = <&pinctrl 0 0 208>;
175 			interrupt-controller;
176 			#interrupt-cells = <2>;
177 			interrupt-parent = <&aic>;
189 		compatible = "arm,armv8-timer";
190 		interrupt-parent = <&aic>;
191 		interrupt-names = "phys", "virt";
198 #include "t7000-pmgr.dtsi"