Lines Matching +full:4 +full:c0
43 mcr p15, 0, r0, c9, c0, 5 @ Allow read-buffer operations from userland
56 mrc p15, 0, r0, c1, c0, 0 @ ctrl register
59 mcr p15, 0, r0, c1, c0, 0 @ disable caches
77 mcr p15, 0, ip, c7, c10, 4 @ drain WB
81 mrc p15, 0, ip, c1, c0, 0 @ ctrl register
84 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
102 mov r0, r0 @ 4 nop padding
105 mov r0, r0 @ 4 nop padding
150 str lr, [sp, #-4]!
152 mcr p15, 0, ip, c9, c0, 0 @ invalidate RB
153 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer
155 ldr pc, [sp], #4
172 mcr p15, 0, r0, c7, c10, 4 @ drain WB
178 .equ cpu_sa1100_suspend_size, 4 * 3
182 mrc p15, 0, r4, c3, c0, 0 @ domain ID
183 mrc p15, 0, r5, c13, c0, 0 @ PID
184 mrc p15, 0, r6, c1, c0, 0 @ control reg
194 mcr p15, 0, ip, c9, c0, 0 @ invalidate RB
195 mcr p15, 0, ip, c9, c0, 5 @ allow user space to use RB
197 mcr p15, 0, r4, c3, c0, 0 @ domain ID
198 mcr p15, 0, r1, c2, c0, 0 @ translation table base addr
199 mcr p15, 0, r5, c13, c0, 0 @ PID
209 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
215 mrc p15, 0, r0, c1, c0 @ get control register v4